# Latest

**URL:** https://discuss.pynq.io/latest.md

[Latest](https://discuss.pynq.io/latest.md) · [Categories](https://discuss.pynq.io/categories.md)

---

## [Welcome to the new PYNQ community forum!](https://discuss.pynq.io/t/welcome-to-the-new-pynq-community-forum/7)

<div class="topic-metadata">

**Author:** [@system](https://discuss.pynq.io/u/system)\
**Replies:** 0\
**Last updated:** [May 8, 2019, 7:00am UTC](https://discuss.pynq.io/t/welcome-to-the-new-pynq-community-forum/7 "2019-05-08T07:00:00Z")

</div>

PYNQ community is for software, embedded and hardware engineers who would like to benefit from the productivity of PYNQ framework and the performance of Xilinx processing platforms. Here you will find people who are exc…

---

## [Low throughput to USB 3.0 storage on RFSoC 4x2](https://discuss.pynq.io/t/low-throughput-to-usb-3-0-storage-on-rfsoc-4x2/9150)

<div class="topic-metadata">

**Author:** [@DogP](https://discuss.pynq.io/u/DogP)\
**Replies:** 3\
**Last updated:** [September 16, 2026, 7:47am UTC](https://discuss.pynq.io/t/low-throughput-to-usb-3-0-storage-on-rfsoc-4x2/9150 "2026-09-16T07:47:39Z")

</div>

I’m using an RFSoC 4x2 with a USB SSD (Crucial X8) and seeing fairly low throughput to/from the SSD. I’m running PYNQ 3.1.1 with a patched device tree using the settings from @joshgoldsmith 's PR ( device tree fix for u…

---

## [Low Ethernet Throughput (200 Mbps) on ZynqMP RFSoC4x2 with PYNQ - Is this a known limitation?](https://discuss.pynq.io/t/low-ethernet-throughput-200-mbps-on-zynqmp-rfsoc4x2-with-pynq-is-this-a-known-limitation/8982)

<div class="topic-metadata">

**Author:** [@Gergo\_Kovacs](https://discuss.pynq.io/u/Gergo_Kovacs)\
**Replies:** 17\
**Last updated:** [September 13, 2026, 6:38am UTC](https://discuss.pynq.io/t/low-ethernet-throughput-200-mbps-on-zynqmp-rfsoc4x2-with-pynq-is-this-a-known-limitation/8982 "2026-09-13T06:38:38Z")

</div>

Hi everyone, I am running the latest PYNQ image (3.1.1) on RFSoC4x2 board, and I am struggling to achieve line-rate (1 Gbps) Ethernet performance. Currently, when running iperf3, I am consistently capped at approximate…

---

## [Image Processing issue on PYNQ Z2](https://discuss.pynq.io/t/image-processing-issue-on-pynq-z2/9158)

<div class="topic-metadata">

**Author:** [@Danny10](https://discuss.pynq.io/u/Danny10)\
**Replies:** 0\
**Last updated:** [August 28, 2026, 10:25am UTC](https://discuss.pynq.io/t/image-processing-issue-on-pynq-z2/9158 "2026-08-28T10:25:36Z")

</div>

Hello everyone! I am working in a startup where i am working on the pynq Z2 for media trasmission. I am trying a Image processing on PYNQ Z2 board where i am testing VDMA for image processing but even after register set…

---

## [Controlling image tones on ZCU208](https://discuss.pynq.io/t/controlling-image-tones-on-zcu208/9155)

<div class="topic-metadata">

**Author:** [@reki](https://discuss.pynq.io/u/reki)\
**Replies:** 1\
**Last updated:** [August 25, 2026, 10:52am UTC](https://discuss.pynq.io/t/controlling-image-tones-on-zcu208/9155 "2026-08-25T10:52:51Z")

</div>

I am trying to send signals on my ZCU208 board, and am new to the field of signal processing. My board is the ZCU208, and I am using the base overlay. I have changed it slightly to get a sense of how the development proc…

---

## [How to Work Around Xlnk being used in https://github.com/Xilinx/LSTM-PYNQ](https://discuss.pynq.io/t/how-to-work-around-xlnk-being-used-in-https-github-com-xilinx-lstm-pynq/3810)

<div class="topic-metadata">

**Author:** [@savannah](https://discuss.pynq.io/u/savannah)\
**Replies:** 4\
**Last updated:** [August 24, 2026, 2:22pm UTC](https://discuss.pynq.io/t/how-to-work-around-xlnk-being-used-in-https-github-com-xilinx-lstm-pynq/3810 "2026-08-24T14:22:10Z")

</div>

Hi, I am trying to use the PYNQ board for Optical Character Recognition (OCR). I found this git repo that does exactly what I am looking for; however, it is a few years old and is still using Xlnk. So, when I try to clo…

---

## [PYNQ Z2 old 3d model](https://discuss.pynq.io/t/pynq-z2-old-3d-model/6592)

<div class="topic-metadata">

**Author:** [@briansune](https://discuss.pynq.io/u/briansune)\
**Replies:** 1\
**Last updated:** [August 23, 2026, 2:43am UTC](https://discuss.pynq.io/t/pynq-z2-old-3d-model/6592 "2026-08-23T02:43:22Z")

</div>

Dear all, I would like to point out an issue: Modulator posted STEP 3D CAD is not aligned with the latest purchase board. As we can see here: However, the actual board: It is sure below 11mm, hences using such…

---

## [PYNQ Z2 3D files and/or technical drawing](https://discuss.pynq.io/t/pynq-z2-3d-files-and-or-technical-drawing/9152)

<div class="topic-metadata">

**Author:** [@0115\_ROSHAN\_TRIPATHY](https://discuss.pynq.io/u/0115_ROSHAN_TRIPATHY)\
**Replies:** 0\
**Last updated:** [August 23, 2026, 2:41am UTC](https://discuss.pynq.io/t/pynq-z2-3d-files-and-or-technical-drawing/9152 "2026-08-23T02:41:31Z")

</div>

I am trying to make a extension board and for the same i need the exact measurements of the PMOD and HDMI of the PYNQ Z2 board. Prior forum post have a STL file but other posts mention that the distance between the PMODs…

---

## [Does PYNQ support ZU67DR?](https://discuss.pynq.io/t/does-pynq-support-zu67dr/6780)

<div class="topic-metadata">

**Author:** [@w22161](https://discuss.pynq.io/u/w22161)\
**Replies:** 10\
**Last updated:** [August 21, 2026, 2:31pm UTC](https://discuss.pynq.io/t/does-pynq-support-zu67dr/6780 "2026-08-21T14:31:08Z")

</div>

FPGA: zu67DR PYNQ: 3.01 tried GitHub - Xilinx/PYNQ: Python Productivity for ZYNQ and GitHub - Xilinx/RFSoC-PYNQ: Python productivity for RFSoC platforms Hi , Does PYNQ support ZU67DR? From description, it should supp…

---

## [Audio processing failed in PYNQ Z2](https://discuss.pynq.io/t/audio-processing-failed-in-pynq-z2/9145)

<div class="topic-metadata">

**Author:** [@Danny10](https://discuss.pynq.io/u/Danny10)\
**Replies:** 0\
**Last updated:** [August 8, 2026, 4:47pm UTC](https://discuss.pynq.io/t/audio-processing-failed-in-pynq-z2/9145 "2026-08-08T16:47:26Z")

</div>

hello everyone, I am assigned to a project on pynq. I want to transfer a LIve audio in the board . but getting error in transmitting . I am using VIVADO 23.1 version to built a block diagrm for my own BItstream generati…

---

## [Pynq Z2 Ethernet Connection](https://discuss.pynq.io/t/pynq-z2-ethernet-connection/9143)

<div class="topic-metadata">

**Author:** [@Danny10](https://discuss.pynq.io/u/Danny10)\
**Replies:** 2\
**Last updated:** [August 8, 2026, 6:38am UTC](https://discuss.pynq.io/t/pynq-z2-ethernet-connection/9143 "2026-08-08T06:38:53Z")

</div>

Hello everyone!!! I am working on Pynqz2 board where as per setup guide I have even properly working on the board by accessing jupyter notebook. But I was getting issue that i don’t have PL I2c adapter to resolve it i …

---

## [Bitstream works ok when programmed by JTAG but not from Pynq](https://discuss.pynq.io/t/bitstream-works-ok-when-programmed-by-jtag-but-not-from-pynq/858)

<div class="topic-metadata">

**Author:** [@Ralph\_Martin](https://discuss.pynq.io/u/Ralph_Martin)\
**Replies:** 19\
**Last updated:** [August 6, 2026, 1:10pm UTC](https://discuss.pynq.io/t/bitstream-works-ok-when-programmed-by-jtag-but-not-from-pynq/858 "2026-08-06T13:10:06Z")

</div>

I am currently developing a Pynq project, using a Pynq-Z2. I have already followed the tuorials and successfully created and used bitstreams from Python using the leds and switches. I have put together an audio IP block…

---

## [RFsoc 4\*2 (RF Analyzer application issue)](https://discuss.pynq.io/t/rfsoc-4-2-rf-analyzer-application-issue/9109)

<div class="topic-metadata">

**Author:** [@Vamsi](https://discuss.pynq.io/u/Vamsi)\
**Replies:** 2\
**Last updated:** [August 6, 2026, 4:40am UTC](https://discuss.pynq.io/t/rfsoc-4-2-rf-analyzer-application-issue/9109 "2026-08-06T04:40:35Z")

</div>

Hey Folks, i am trying to do spur analysis for rfsoc 4\*2 board, i thought to use RF analyzer application for whole chain analysis, but when i am trying to do the setup with board\<-\> RF Analyzer application, i am getting…

---

## [wip220 library not appearing in Vitis 2026.1 standalone BSP for Zynq-7000 – encoding fix applied, hardware verified](https://discuss.pynq.io/t/wip220-library-not-appearing-in-vitis-2026-1-standalone-bsp-for-zynq-7000-encoding-fix-applied-hardware-verified/9136)

<div class="topic-metadata">

**Author:** [@Brendan](https://discuss.pynq.io/u/Brendan)\
**Replies:** 1\
**Last updated:** [July 29, 2026, 4:26pm UTC](https://discuss.pynq.io/t/wip220-library-not-appearing-in-vitis-2026-1-standalone-bsp-for-zynq-7000-encoding-fix-applied-hardware-verified/9136 "2026-07-29T16:26:24Z")

</div>

PYNQ version & Board name & Tool Version Board: PYNQ‑Z2 (xc7z020clg400-1) Tools: Vivado 2026.1 / Vitis 2026.1 PYNQ image: not used – this is a bare‑metal standalone application (no Linux, no PYNQ framework). OS: Standa…

---

## [DMA error in DAC-ADC loopback](https://discuss.pynq.io/t/dma-error-in-dac-adc-loopback/5773)

<div class="topic-metadata">

**Author:** [@mselva2](https://discuss.pynq.io/u/mselva2)\
**Replies:** 5\
**Last updated:** [July 27, 2026, 6:46am UTC](https://discuss.pynq.io/t/dma-error-in-dac-adc-loopback/5773 "2026-07-27T06:46:17Z")

</div>

PYNQ Version: PYNQ 2.7.0 Board: ZCU111 Error: DMA channel not started ADC : ADC224\_T0\_CH0 DAC: DAC229\_T1\_CH2 Problem Description: I want to do DAC-ADC loopback in ZCU111 board. So, I generated sinusoidal signal of …

---

## [Pynq on zcu208](https://discuss.pynq.io/t/pynq-on-zcu208/2400)

<div class="topic-metadata">

**Author:** [@andrea](https://discuss.pynq.io/u/andrea)\
**Replies:** 13\
**Last updated:** [July 24, 2026, 11:46pm UTC](https://discuss.pynq.io/t/pynq-on-zcu208/2400 "2026-07-24T23:46:26Z")

</div>

Hello, I have a question. I would like to know if it’s possible to use a pynq SD image with a zcu208 board. I find the images for ZCU104 and ZCU111, but I would like to ask if a ZCU208 is availabe or if it will be. T…

---

## [RuntimeError: No Devices Found on fresh PYNQ 3.1.1 image, multiple PYNQ-Z2 boards](https://discuss.pynq.io/t/runtimeerror-no-devices-found-on-fresh-pynq-3-1-1-image-multiple-pynq-z2-boards/9134)

<div class="topic-metadata">

**Author:** [@priyanshu\_pranay](https://discuss.pynq.io/u/priyanshu_pranay)\
**Replies:** 2\
**Last updated:** [July 24, 2026, 11:43am UTC](https://discuss.pynq.io/t/runtimeerror-no-devices-found-on-fresh-pynq-3-1-1-image-multiple-pynq-z2-boards/9134 "2026-07-24T11:43:45Z")

</div>

\- Environment: Board: PYNQ-Z2 (tested on 2+ boards) PYNQ version: 3.1.1 (fresh official image from PYNQ supported boards and PYNQ pre-built images | PYNQ) Bitstream: Vivado 2024.1 OS: Ubuntu 22.04 Problem: Overlay …

---

## [AUP-ZU3 Pcam 5C read frame stuck](https://discuss.pynq.io/t/aup-zu3-pcam-5c-read-frame-stuck/9010)

<div class="topic-metadata">

**Author:** [@Preston-Walker](https://discuss.pynq.io/u/Preston-Walker)\
**Replies:** 17\
**Last updated:** [July 21, 2026, 7:38pm UTC](https://discuss.pynq.io/t/aup-zu3-pcam-5c-read-frame-stuck/9010 "2026-07-21T19:38:43Z")

</div>

Board: AUP-ZU3 (8GB) PYNQ Version: 3.1 Issue: readframe() hangs indefinitely when trying to capture frames from a Pcam 5C (OV5640) camera using the base overlay’s MIPI pipeline. The call never returns and no frames ar…

---

## [Two channel Phase synchronized RF output from RFSoC 4\*2 board](https://discuss.pynq.io/t/two-channel-phase-synchronized-rf-output-from-rfsoc-4-2-board/8817)

<div class="topic-metadata">

**Author:** [@sujit](https://discuss.pynq.io/u/sujit)\
**Replies:** 2\
**Last updated:** [July 17, 2026, 1:46pm UTC](https://discuss.pynq.io/t/two-channel-phase-synchronized-rf-output-from-rfsoc-4-2-board/8817 "2026-07-17T13:46:35Z")

</div>

I want to generate two RF output of same frequency and same amplitude in two channels of the RFSoC board but they should be perfectly phase synchronized. Currently I am not able to generate the phase synchronization. The…

---

## [Tutorial: Using RFSoC with PYNQ.remote](https://discuss.pynq.io/t/tutorial-using-rfsoc-with-pynq-remote/9128)

<div class="topic-metadata">

**Author:** [@Ironmanna](https://discuss.pynq.io/u/Ironmanna)\
**Replies:** 2\
**Last updated:** [July 15, 2026, 2:20pm UTC](https://discuss.pynq.io/t/tutorial-using-rfsoc-with-pynq-remote/9128 "2026-07-15T14:20:46Z")

</div>

Hi everyone, In PYNQ 3.1 we introduced PYNQ.remote, which lets you run PYNQ and interact with a board directly from your host computer, instead of on the board itself. Our latest release extends PYNQ.remote with RFSoC s…

---

## [RFSoC 4x2: USB host and USB Device NOT working](https://discuss.pynq.io/t/rfsoc-4x2-usb-host-and-usb-device-not-working/6090)

<div class="topic-metadata">

**Author:** [@Mohammad\_Hossein\_Sam](https://discuss.pynq.io/u/Mohammad_Hossein_Sam)\
**Replies:** 14\
**Last updated:** [July 13, 2026, 1:33pm UTC](https://discuss.pynq.io/t/rfsoc-4x2-usb-host-and-usb-device-not-working/6090 "2026-07-13T13:33:22Z")

</div>

Hi, By all means, I tried all different ways including following link: Unfortunately none of the USB ports are functional. the board is not able to detect any connected USB key or USB camera. lsblk, lsusb in termina…

---

## [ZCU111 DAC ADC Loopback keep getting stuck](https://discuss.pynq.io/t/zcu111-dac-adc-loopback-keep-getting-stuck/9123)

<div class="topic-metadata">

**Author:** [@HIMANSHU\_HIMANSHU](https://discuss.pynq.io/u/HIMANSHU_HIMANSHU)\
**Replies:** 5\
**Last updated:** [July 13, 2026, 1:31pm UTC](https://discuss.pynq.io/t/zcu111-dac-adc-loopback-keep-getting-stuck/9123 "2026-07-13T13:31:42Z")

</div>

PYNQ Version : 3.0.1 Vivado version 2022.1 I am trying to build a simple ADC and DAC loopback setup for ZCU111 and getting stuck in the dac configuration step. import numpy as np import scipy import scipy.io import sc…

---

## [PYNQ.remote now supports RFSoC](https://discuss.pynq.io/t/pynq-remote-now-supports-rfsoc/9129)

<div class="topic-metadata">

**Author:** [@joshgoldsmith](https://discuss.pynq.io/u/joshgoldsmith)\
**Replies:** 0\
**Last updated:** [July 13, 2026, 10:19am UTC](https://discuss.pynq.io/t/pynq-remote-now-supports-rfsoc/9129 "2026-07-13T10:19:54Z")

</div>

Hi everyone, Happy to announce that PYNQ.remote now supports Zynq UltraScale+ RFSoC devices! Check out our latest tutorial where we show StrathSDR’s RFSoC Spectrum Analyser Module running on the RFSoC4x2 using PYNQ.rem…

---

## [Increasing DAC sampling rate for RFSoC board](https://discuss.pynq.io/t/increasing-dac-sampling-rate-for-rfsoc-board/9099)

<div class="topic-metadata">

**Author:** [@grant](https://discuss.pynq.io/u/grant)\
**Replies:** 6\
**Last updated:** [July 3, 2026, 1:44pm UTC](https://discuss.pynq.io/t/increasing-dac-sampling-rate-for-rfsoc-board/9099 "2026-07-03T13:44:11Z")

</div>

Hi, I am working with the RFSoC 4x2 board and would like increase the DAC sampling rate to 9.8 GSPS as advertised in the manual. I looked at past forums and it seems it can be set using xrfdc driver but I am confused how…

---

## [DynamicPLLConfig freezes RFSoC4x2](https://discuss.pynq.io/t/dynamicpllconfig-freezes-rfsoc4x2/7365)

<div class="topic-metadata">

**Author:** [@xinyang](https://discuss.pynq.io/u/xinyang)\
**Replies:** 2\
**Last updated:** [July 3, 2026, 12:59pm UTC](https://discuss.pynq.io/t/dynamicpllconfig-freezes-rfsoc4x2/7365 "2026-07-03T12:59:36Z")

</div>

Dear PYNQ Community, The system environment I am working on: Ubuntu 20.04.6 LTS Vivado 2022.1 PYNQ 3.0.1 I have developed a small project on RFSoC4x2 which uses a DMA to read stored IQ samples and send them to RF dat…

---

## [ZCU111 RFSOC PYNQ External clocking ( LMX2594 )](https://discuss.pynq.io/t/zcu111-rfsoc-pynq-external-clocking-lmx2594/689)

<div class="topic-metadata">

**Author:** [@SimonHildebrand](https://discuss.pynq.io/u/SimonHildebrand)\
**Replies:** 3\
**Last updated:** [July 3, 2026, 11:02am UTC](https://discuss.pynq.io/t/zcu111-rfsoc-pynq-external-clocking-lmx2594/689 "2026-07-03T11:02:10Z")

</div>

Hi, I am using PYNQ with ZCU111 RFSOC board. I can reprogram the LMX2594 external PLL using the SDK baremetal drivers. However I have never succeeded in progamming the LMX2594 from PYNQ Pyhton drivers. I have taken one …

---

## [Custom Terminal name](https://discuss.pynq.io/t/custom-terminal-name/9121)

<div class="topic-metadata">

**Author:** [@Amit\_Hiremath](https://discuss.pynq.io/u/Amit_Hiremath)\
**Replies:** 3\
**Last updated:** [July 3, 2026, 10:39am UTC](https://discuss.pynq.io/t/custom-terminal-name/9121 "2026-07-03T10:39:05Z")

</div>

Hello, We have custom XC7020 board, we want to change hostname to some custom name, when we turn on the board we see following name in the terminal: xilinx@pynq Welcome to Xilinx Linux and password is also xilinx ho…

---

## [RFSoC 4\*2 DAC sampling rate problem](https://discuss.pynq.io/t/rfsoc-4-2-dac-sampling-rate-problem/7795)

<div class="topic-metadata">

**Author:** [@joe052790](https://discuss.pynq.io/u/joe052790)\
**Replies:** 3\
**Last updated:** [July 2, 2026, 4:47pm UTC](https://discuss.pynq.io/t/rfsoc-4-2-dac-sampling-rate-problem/7795 "2026-07-02T16:47:50Z")

</div>

Device: RFSoC 4x2 Kit PYNQ Version: v3.0. I am rebuilding the RFSoC 4x2 MTS project and have changed the DAC sampling rate to 8G and the ADC sampling rate to 4G. I successfully loaded this bitstream file in JupyterLab…

---

## [RFSoC4x2 PMOD Differential Signaling Confusion](https://discuss.pynq.io/t/rfsoc4x2-pmod-differential-signaling-confusion/9094)

<div class="topic-metadata">

**Author:** [@cameronpoe](https://discuss.pynq.io/u/cameronpoe)\
**Replies:** 1\
**Last updated:** [July 1, 2026, 3:04pm UTC](https://discuss.pynq.io/t/rfsoc4x2-pmod-differential-signaling-confusion/9094 "2026-07-01T15:04:29Z")

</div>

This is more of a hardware question, but I’ll ask here just in case anyone is familiar. I am using the RFSoC4x2. In the manual from Real Digital, it says “All 22 FPGA signals are routed as differential pairs.” When I in…

---

## [Scatter-Gather of AXI DMA on RFSoC 4x2 problem](https://discuss.pynq.io/t/scatter-gather-of-axi-dma-on-rfsoc-4x2-problem/9119)

<div class="topic-metadata">

**Author:** [@gveio](https://discuss.pynq.io/u/gveio)\
**Replies:** 1\
**Last updated:** [June 29, 2026, 2:59pm UTC](https://discuss.pynq.io/t/scatter-gather-of-axi-dma-on-rfsoc-4x2-problem/9119 "2026-06-29T14:59:35Z")

</div>

Hello everyone, I am trying to use Scatter-Gather (SG) mode of the AXI DMA on an RFSoC 4x2 board running PYNQ v3.0.1. Setup - Board: RFSoC 4x2 (XCZU48DR) - PYNQ image: v3.0.1 - Vivado: 2025.1 - AXI DMA configured a…

[Next page](https://discuss.pynq.io/latest.md?page=1)
