# A simplified Device Identifier and Device DNA AXI read IP for PYNQ

**URL:** <https://discuss.pynq.io/t/a-simplified-device-identifier-and-device-dna-axi-read-ip-for-pynq/6141>\
**Category:** Learn\
**Created:** [October 4, 2023, 5:29am UTC](https://discuss.pynq.io/t/a-simplified-device-identifier-and-device-dna-axi-read-ip-for-pynq/6141 "2023-10-04T05:29:34Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![briansune](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/briansune/32/3087_2.png) [@briansune](https://discuss.pynq.io/u/briansune)\
**Post date:** [October 4, 2023, 5:29am UTC](https://discuss.pynq.io/t/a-simplified-device-identifier-and-device-dna-axi-read-ip-for-pynq/6141/1 "2023-10-04T05:29:34Z")

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Dear all,

I am sharing a simple DNA IP without HLS and pure Verilog coding.  
This example is targeted ZYNQ 7000 series.  
This can be read via Python MMIO script.  
DNA is an unique ID preprogrammed onto each FPGA and can be used to identify the device for production or development board logging in University and Corporation.

> **[GitHub - briansune/Xilinx-DNA-Verilog: Xilinx DNA Verilog](https://github.com/briansune/Xilinx-DNA-Verilog)**
>
> Xilinx DNA Verilog. Contribute to briansune/Xilinx-DNA-Verilog development by creating an account on GitHub.

ENJOY~