# AXI DMA issue when trying out without loopback in RFSoC2x2

**URL:** <https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080>\
**Category:** Support\
**Created:** [May 29, 2024, 4:26pm UTC](https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080 "2024-05-29T16:26:48Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![hdutta](https://avatars.discourse-cdn.com/v4/letter/h/ebca7d/32.png) [@hdutta](https://discuss.pynq.io/u/hdutta)\
**Post date:** [May 29, 2024, 4:26pm UTC](https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080/1 "2024-05-29T16:26:48Z")

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I was trying a project which is quite similar to [strath-sdr/rfsoc\_ofdm: PYNQ example of an OFDM Transmitter and Receiver on RFSoC. (github.com)](https://github.com/strath-sdr/rfsoc_ofdm/tree/main). My project is at the below location -  
[himanshudutta11/rfsoc\_nrssb (github.com)](https://github.com/himanshudutta11/rfsoc_nrssb)  
The issue is that whenever I am trying to receive the samples through AXI stream from RFADC, (there is a wideband antenna connected to RFADC [have not connected an LNA and LPF yet, but I can connect them as a next step]), somehow it is stuck after the first axi transfer.  
First transfer-\>  
nrssb.inspector.axi\_dma.recvchannel.transfer(nrssb.inspector.buffer)  
Second transfer →   
nrssb.inspector.axi\_dma.recvchannel.transfer(nrssb.inspector.buffer)

Even OFDM modem as mentioned above get stuck in the inspector.get\_frame() if I run without loopback.

```
def get_frame(self):
    """Get a single buffer of time data from the logic fabric
    """
    self.data_inspector_module.reset = 0
    self.axi_dma.recvchannel.transfer(self.buffer)
    self.data_inspector_module.enable = 1
    self.axi_dma.recvchannel.wait() --> stuck here

```

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<div class="post-metadata">

**Author:** ![matthew](https://avatars.discourse-cdn.com/v4/letter/m/ed655f/32.png) [@matthew](https://discuss.pynq.io/u/matthew)\
**Post date:** [May 29, 2024, 5:29pm UTC](https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080/2 "2024-05-29T17:29:42Z")

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What is the size of the buffer you want to transmit? This delay issue can occur when the size of the lower or higher than a DMA size requirement.

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<div class="post-metadata">

**Author:** ![hdutta](https://avatars.discourse-cdn.com/v4/letter/h/ebca7d/32.png) [@hdutta](https://discuss.pynq.io/u/hdutta)\
**Post date:** [May 30, 2024, 3:55am UTC](https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080/3 "2024-05-30T03:55:20Z")

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Is it about the axi\_dma.buffer\_max\_size?

Initially I didn’t set this explicitly and the default value what I observe was 67108863 = 0x03FFFFFF, I tried to modify it to 256, 512, 1024, it is still stuck.

 ![image](https://us1.discourse-cdn.com/flex019/uploads/pynq1/original/2X/0/00e91bfb8738e92637b63e8f00b1b1c35622dfe8.png)

The AXI\_DMA structure looks like below:

 ![image](https://us1.discourse-cdn.com/flex019/uploads/pynq1/original/2X/8/8d64d28b74709fb1e91552a070fa3a84727120c5.png)

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<div class="post-metadata">

**Author:** ![matthew](https://avatars.discourse-cdn.com/v4/letter/m/ed655f/32.png) [@matthew](https://discuss.pynq.io/u/matthew)\
**Post date:** [June 7, 2024, 2:37pm UTC](https://discuss.pynq.io/t/axi-dma-issue-when-trying-out-without-loopback-in-rfsoc2x2/7080/4 "2024-06-07T14:37:15Z")

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What is inside the nrssb.inspector.buffer? Can you increase the number of element in that buffer?