# CacheMetadataError **URL:** \ **Category:** Support\ **Created:** [November 27, 2023, 9:08am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367 "2023-11-27T09:08:53Z")\ **Posts on this page:** 11\ **Page:** 1
**Author:** ![Roghy](https://avatars.discourse-cdn.com/v4/letter/r/8baadc/32.png) [@Roghy](https://discuss.pynq.io/u/Roghy)\ **Post date:** [November 27, 2023, 9:08am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/1 "2023-11-27T09:08:53Z")
hello! I am working with “xczu47dr” and i face with “CacheMetadataError” when i import my bit file. the bit file is work in hardware by the way. I am new in PYNQ and I cant understand this error. I attached .hwh file. I appreciate any help. [block\_design.hwh](https://discuss.pynq.io/uploads/short-url/cbb5y1F2gup69gzCajb2qOIJKWV.hwh) (1.4 MB) ---
**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\ **Post date:** [November 27, 2023, 11:27am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/2 "2023-11-27T11:27:33Z")
Hi @Roghy, Welcome to the PYNQ community. It would be good if you can provide which version of the tool and which board you are using. Also, when exactly are you getting this error? Please, provide a code snippet ---
**Author:** ![Roghy](https://avatars.discourse-cdn.com/v4/letter/r/8baadc/32.png) [@Roghy](https://discuss.pynq.io/u/Roghy)\ **Post date:** [November 27, 2023, 11:40am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/3 "2023-11-27T11:40:22Z")
Hi, thanks for your answer. I am using vivado 2021.1, xczu47dr-fsvg1517-2-e (active) , pynq 3.0.1 I get this error when i import the bit file. Thank you very much. [CacheMetadataError.pdf](https://discuss.pynq.io/uploads/short-url/iNTB6yjnrM1YRNxmh7Ea3LktDSS.pdf) (1.7 MB) ---
**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\ **Post date:** [November 27, 2023, 12:24pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/4 "2023-11-27T12:24:43Z")
@Roghy, The error seems related to the DDR4. Can you please provide your block diagram from Vivado IP Integrator? Mario ---
**Author:** ![Roghy](https://avatars.discourse-cdn.com/v4/letter/r/8baadc/32.png) [@Roghy](https://discuss.pynq.io/u/Roghy)\ **Post date:** [November 27, 2023, 3:48pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/5 "2023-11-27T15:48:55Z")
Hi hopefully this two attached file be useful to help me. Best regards ![image](https://us1.discourse-cdn.com/flex019/uploads/pynq1/original/2X/4/4f5709da102f49629d0e8b1e0d0c904078ded51e.png) [block\_design.tcl](https://discuss.pynq.io/uploads/short-url/5Xpac662HN8jgQxYpxKHlLwLqvt.tcl) (125.3 KB) ---
**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\ **Post date:** [November 27, 2023, 4:32pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/6 "2023-11-27T16:32:21Z")
Sorry, the resolution prevents from checking anything. Are you able to export the design from IPI to PDF directly? ---
**Author:** ![Roghy](https://avatars.discourse-cdn.com/v4/letter/r/8baadc/32.png) [@Roghy](https://discuss.pynq.io/u/Roghy)\ **Post date:** [November 27, 2023, 4:49pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/7 "2023-11-27T16:49:50Z")
I am so sorry, I should mention, I delete the DDR4 and now i can import bit file, But it would be very nice to now what is wrong with DDR4 which I cant import the last bit file. The PYNQ is new for me, a little bit confusing. [block\_design.pdf](https://discuss.pynq.io/uploads/short-url/pb71FEgrx6nyHJAtPxXVRP7uHcv.pdf) (315.7 KB) ---
**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\ **Post date:** [November 27, 2023, 5:42pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/8 "2023-11-27T17:42:34Z")
Hi @Roghy, Looking at your block design, I see that you are connecting the DDR4 controller directly to the `M_AXI_HPM` ports. Typically the PL DRAM will not be connected to the PS. Can you elaborate a bit more what you are trying to accomplish? One workaround you can try, although this may cause other issues, is to comment out lines 464-467 of this file `/usr/local/share/pynq-venv/lib/python3.10/site-packages/pynqmetadata/fronte nds/hwh_frontend.py` Mario ---
**Author:** ![Roghy](https://avatars.discourse-cdn.com/v4/letter/r/8baadc/32.png) [@Roghy](https://discuss.pynq.io/u/Roghy)\ **Post date:** [November 28, 2023, 10:54am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/9 "2023-11-28T10:54:07Z")
hello, thanks for your prompt answer. as I realized, I should use MMIO and DMA for this connection, is that right? also, how can i access to `/usr/local/share/pynq-venv/lib/python3.10/site-packages/pynqmetadata/fronte nds/hwh_frontend.py` from my jupyter to make change? Thank you very much for your time and consideration. ---
**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\ **Post date:** [November 28, 2023, 12:23pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/10 "2023-11-28T12:23:25Z")
Hi @Roghy, > as I realized, I should use MMIO and DMA for this connection, is that right? This really depends on your application, but you probably may want a DMA to free the CPU of all this data movement. You can check this design to see how the PLDRAM is being used: [GitHub - Xilinx/RFSoC-MTS: A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).](https://github.com/Xilinx/RFSoC-MTS/tree/main) > how can i access to `/usr/local/share/pynq-venv/lib/python3.10/site-packages/pynqmetadata/fronte nds/hwh_frontend.py` from my jupyter to make change? `vim` or `nano` via the command line in JupyterLab. Mario ---
**Author:** ![stf](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/stf/32/2724_2.png) [@stf](https://discuss.pynq.io/u/stf)\ **Post date:** [November 28, 2023, 1:23pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/11 "2023-11-28T13:23:51Z")
Hi @Roghy, I have a branch up with a fix for the issue you’re facing (based on what @marioruiz was suggesting). Would you mind testing it, and if it solves your issue we can work on including it into the next release. In a terminal in JupyterLab could you try running the following: ```auto python3 -m pip uninstall pynqmetadata python3 -m pip cache purge python3 -m pip install git+https://github.com/STFleming/PYNQ-Metadata.git@vivado_target ``` And report back if that allows you to load the overlay? Thanks so much, Shane