# CacheMetadataError

**URL:** <https://discuss.pynq.io/t/cachemetadataerror/6367>\
**Category:** Support\
**Created:** [November 27, 2023, 9:08am UTC](https://discuss.pynq.io/t/cachemetadataerror/6367 "2023-11-27T09:08:53Z")\
**Posts on this page:** 1\
**Showing post:** 10

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**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\
**Post date:** [November 28, 2023, 12:23pm UTC](https://discuss.pynq.io/t/cachemetadataerror/6367/10 "2023-11-28T12:23:25Z")

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Hi @Roghy,

> as I realized, I should use MMIO and DMA for this connection, is that right?

This really depends on your application, but you probably may want a DMA to free the CPU of all this data movement. You can check this design to see how the PLDRAM is being used: [GitHub - Xilinx/RFSoC-MTS: A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).](https://github.com/Xilinx/RFSoC-MTS/tree/main)

> how can i access to `/usr/local/share/pynq-venv/lib/python3.10/site-packages/pynqmetadata/fronte nds/hwh_frontend.py` from my jupyter to make change?

`vim` or `nano` via the command line in JupyterLab.

Mario

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