# Custom HLS IP block using DMA

**URL:** <https://discuss.pynq.io/t/custom-hls-ip-block-using-dma/4976>\
**Category:** Support\
**Created:** [November 29, 2022, 8:15pm UTC](https://discuss.pynq.io/t/custom-hls-ip-block-using-dma/4976 "2022-11-29T20:15:41Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![cteq.eu](https://avatars.discourse-cdn.com/v4/letter/c/a587f6/32.png) [@cteq.eu](https://discuss.pynq.io/u/cteq.eu)\
**Post date:** [November 29, 2022, 8:15pm UTC](https://discuss.pynq.io/t/custom-hls-ip-block-using-dma/4976/1 "2022-11-29T20:15:41Z")

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- I am using Vitis 2022.1, Vivado 2022.1 and Pynq v3.0 on Pynq-Z2.

I developed a custom HLS block following the tutorial on pp4fpga following this tutorial [High\_Level\_Synthesis\_for\_FPGAs/Lab2 at main · ZongRuLi/High\_Level\_Synthesis\_for\_FPGAs · GitHub](https://github.com/ZongRuLi/High_Level_Synthesis_for_FPGAs/tree/main/Lab2)

I get all 0x00 results back from the DMA even when using the hardware from the original repo in the link.

Here is my design:  
[design\_1\_wrapper.bit](https://discuss.pynq.io/uploads/short-url/qe4diaTRo3mfLZNm6eRFZ700qMJ.bit) (3.9 MB)  
[design\_1\_wrapper.hwh](https://discuss.pynq.io/uploads/short-url/s7UYLsVECqrIUeyOHhYMd3DiggJ.hwh) (317.4 KB)  
[DMA\_TEST.ipynb](https://discuss.pynq.io/uploads/short-url/8Sm1fN00PxTBki3FruWj8nL8Uau.ipynb) (5.3 KB)

I cannot figure out what I am doing wrong, the implemented code ([High\_Level\_Synthesis\_for\_FPGAs/streamMul.cpp at main · ZongRuLi/High\_Level\_Synthesis\_for\_FPGAs · GitHub](https://github.com/ZongRuLi/High_Level_Synthesis_for_FPGAs/blob/main/Lab2/streamMul/streamMul.cpp) ) is working fine in Simulation (HLS)

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**Author:** ![mizan](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/mizan/32/2119_2.png) [@mizan](https://discuss.pynq.io/u/mizan)\
**Post date:** [December 2, 2022, 6:02am UTC](https://discuss.pynq.io/t/custom-hls-ip-block-using-dma/4976/2 "2022-12-02T06:02:35Z")

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I am not sure, but could you try adding tlast & tkeep signal to the hls code. It might solve your issue.

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**Author:** ![cteq.eu](https://avatars.discourse-cdn.com/v4/letter/c/a587f6/32.png) [@cteq.eu](https://discuss.pynq.io/u/cteq.eu)\
**Post date:** [December 2, 2022, 8:28am UTC](https://discuss.pynq.io/t/custom-hls-ip-block-using-dma/4976/3 "2022-12-02T08:28:47Z")

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Hi Mizan,  
thanks for your reply, I solved this issue myself (Python code problem in Jupyter Notebook)  
solution in the attachment.  
[SingleDMA.ipynb](https://discuss.pynq.io/uploads/short-url/pYqZ5CZ6cY5jeE1jRCHWHvYTy2a.ipynb) (8.0 KB)