# Customizing PYNQ for Pynq-Z1

**URL:** <https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882>\
**Category:** Support\
**Created:** [October 12, 2020, 11:56am UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882 "2020-10-12T11:56:50Z")\
**Posts on this page:** 6\
**Page:** 1

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**Author:** ![DuyTrandeLion](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/duytrandelion/32/1187_2.png) [@DuyTrandeLion](https://discuss.pynq.io/u/DuyTrandeLion)\
**Post date:** [October 12, 2020, 11:56am UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/1 "2020-10-12T11:56:50Z")

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Hello Pynq support,

I am adding my PYNQ-Z1 with KSZ8863 Ethernet PHY Daughter Board ([https://www.microchip.com/Developmenttools/ProductDetails/AC320004-7](https://www.microchip.com/Developmenttools/ProductDetails/AC320004-7)) using the PYNQ image v2.5.4. I edited the base.tcl (adding MII to RMII IP and changing some pins). For the Linux driver ([EVB-KSZ9477/KSZ/linux-drivers/ksz8863 at master · Microchip-Ethernet/EVB-KSZ9477 · GitHub](https://github.com/Microchip-Ethernet/EVB-KSZ9477/tree/master/KSZ/linux-drivers/ksz8863)) of the KSZ8863, I don’t know how to add it in when building the PYNQ image. I also could not found any guide on this. Can you give me any advices?

Thanks and best regards,  
Duy Tran

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**Author:** ![rock](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/rock/32/32_2.png) [@rock](https://discuss.pynq.io/u/rock)\
**Post date:** [October 15, 2020, 5:21pm UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/2 "2020-10-15T17:21:39Z")

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Kernel module has to be compiled with kernel source. You can find kernel source headers on your board by extracting /kernel.tgz  
e.g.

> <https://github.com/byuccl/PYNQ-PRIO/blob/master/boards/ZCU104/prio_linux/linux_drivers/setup_kernel.sh>

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**Author:** ![DuyTrandeLion](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/duytrandelion/32/1187_2.png) [@DuyTrandeLion](https://discuss.pynq.io/u/DuyTrandeLion)\
**Post date:** [October 21, 2020, 4:29am UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/3 "2020-10-21T04:29:38Z")

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Hi @rock,  
So this step I have to do it manually?  
Thanks.

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**Author:** ![DuyTrandeLion](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/duytrandelion/32/1187_2.png) [@DuyTrandeLion](https://discuss.pynq.io/u/DuyTrandeLion)\
**Post date:** [October 21, 2020, 6:26pm UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/4 "2020-10-21T18:26:23Z")

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hi @rock,

I have an small question, there are various .tcl build projects which lead to various .dsa or (hdf) files. Does the PYNQ build script will combine them all to make the .bsp file or just use the .dsa of the base.tcl?

Thanks and best regards,  
Duy

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**Author:** ![rock](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/rock/32/32_2.png) [@rock](https://discuss.pynq.io/u/rock)\
**Post date:** [October 21, 2020, 6:50pm UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/5 "2020-10-21T18:50:59Z")

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`dsa` files are renamed in Xilinx tools to `xsa` files. XSA file is the starting point of a petalinux bsp. PYNQ sdbuild uses the official bsp directly to build SD card images. Other XSA files generated in hardware projects will be just treated as byproducts - they are useful for vitis platform generation.

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<div class="post-metadata">

**Author:** ![DuyTrandeLion](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/duytrandelion/32/1187_2.png) [@DuyTrandeLion](https://discuss.pynq.io/u/DuyTrandeLion)\
**Post date:** [October 22, 2020, 3:25pm UTC](https://discuss.pynq.io/t/customizing-pynq-for-pynq-z1/1882/6 "2020-10-22T15:25:50Z")

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I just spent time reading the build scripts and I understand now. Thanks.