# How to address axilite interface in pynq v3.0

**URL:** <https://discuss.pynq.io/t/how-to-address-axilite-interface-in-pynq-v3-0/4831>\
**Category:** Support\
**Created:** [October 25, 2022, 8:41am UTC](https://discuss.pynq.io/t/how-to-address-axilite-interface-in-pynq-v3-0/4831 "2022-10-25T08:41:12Z")\
**Posts on this page:** 1\
**Showing post:** 12

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**Author:** ![stf](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/stf/32/2724_2.png) [@stf](https://discuss.pynq.io/u/stf)\
**Post date:** [October 25, 2022, 2:33pm UTC](https://discuss.pynq.io/t/how-to-address-axilite-interface-in-pynq-v3-0/4831/12 "2022-10-25T14:33:06Z")

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Thanks Mizan,

I’ll look into the caching issue also. You’re right there is some caching that happens under the hood and I guess in your case it is getting stuck. It is supposed to clear whenever the bitfile changes.

To manually clear the cache can you try:

```auto
from pynq import PL
PL.reset()

```

All the best,  
Shane

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