# No Video Output on Monitor with Custom HDMI Passthrough Design on PYNQ-Z1

**URL:** <https://discuss.pynq.io/t/no-video-output-on-monitor-with-custom-hdmi-passthrough-design-on-pynq-z1/8792>\
**Category:** Support\
**Created:** [October 2, 2025, 12:56pm UTC](https://discuss.pynq.io/t/no-video-output-on-monitor-with-custom-hdmi-passthrough-design-on-pynq-z1/8792 "2025-10-02T12:56:59Z")\
**Posts on this page:** 2\
**Page:** 1

<div class="post-metadata">

**Author:** ![koya1208](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/koya1208/32/7288_2.png) [@koya1208](https://discuss.pynq.io/u/koya1208)\
**Post date:** [October 2, 2025, 12:56pm UTC](https://discuss.pynq.io/t/no-video-output-on-monitor-with-custom-hdmi-passthrough-design-on-pynq-z1/8792/1 "2025-10-02T12:56:59Z")

</div>

Hello everyone,I am a university student from Japan studying FPGAs, and I would be very grateful for your help with a PYNQ project. Please excuse any mistakes in my English.I am currently working on a custom HDMI passthrough design using the AXI VDMA on a PYNQ-Z1 board. I have successfully built the block design in Vivado and generated the bitstream.When I load the overlay in a Jupyter Notebook using the Python script below, the code runs to completion without any errors. However, my external monitor connected to the HDMI output port shows “No Signal” and remains blank.

**System Environment:**

- **Board:** PYNQ-Z1

- **Vivado Version:** 2025.1

**Block Design Overview:**

[hdmi\_pass\_ps.pdf](https://discuss.pynq.io/uploads/short-url/qJDnyCiQy6RVWmE8fhquPfTPUbd.pdf) (106.8 KB)

> **Python Script:**
> 
> from pynq import Overlay  
> from pynq import allocate  
> import numpy as np
> 
> # Load the bitstream
> 
> ol = Overlay(“hdmi\_pass\_ps\_3.bit”)
> 
> # =======================================================
> 
> # 1. Configure the TPG (Test Pattern Generator)
> 
> # =======================================================
> 
> # Assuming the TPG instance in Vivado is named ‘v\_tpg\_0’
> 
> tpg = ol.v\_tpg\_0
> 
> # TPG register offsets
> 
> AP\_CTRL = 0x00  
> WIDTH\_REG = 0x10  
> HEIGHT\_REG = 0x18  
> ENABLE\_INPUT\_REG = 0x28
> 
> print(“Configuring TPG…”)
> 
> # Stop and reset the TPG
> 
> tpg.write(AP\_CTRL, 0x80)
> 
> # Set resolution
> 
> tpg.write(HEIGHT\_REG, 1080)  
> tpg.write(WIDTH\_REG, 1920)
> 
> # Enable passthrough mode (1)
> 
> tpg.write(ENABLE\_INPUT\_REG, 1)
> 
> # Start TPG with auto-restart enabled
> 
> tpg.write(AP\_CTRL, 0x81) print(“TPG started in passthrough mode.”)
> 
> # =======================================================
> 
> # 2. Configure the VDMA
> 
> # =======================================================
> 
> vdma = ol.axi\_vdma\_0  
> dma\_send = vdma.writechannel  
> dma\_recv = vdma.readchannel
> 
> # Define video resolution and format
> 
> width = 1920  
> height = 1080  
> pixel\_bytes = 3  
> frame\_count = 3 # Using 3 frame buffers
> 
> # Allocate frame buffers in DDR memory
> 
> frame\_buffer = allocate(shape=(frame\_count, height, width, pixel\_bytes), dtype=np.uint8)
> 
> # Set the frame buffers for each VDMA channel
> 
> dma\_send.frame\_buffer(frame\_buffer)  
> dma\_recv.frame\_buffer(frame\_buffer)
> 
> # Start the VDMA channels
> 
> print(“Starting VDMA…”)  
> dma\_send.start()  
> dma\_recv.start()
> 
> print(“VDMA passthrough started.”)

**What I’ve Tried:**

- I have confirmed that both the HDMI input source (my PC) and the external monitor are set to 1920x1080 resolution.

Could anyone suggest what I might be missing, or what I should check next? For example, are there common issues with clocking or the Video Timing Controller (V\_TC) that could cause this?

Any help or advice would be greatly appreciated.

Thank you!

---

<div class="post-metadata">

**Author:** ![marioruiz](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/marioruiz/32/2177_2.png) [@marioruiz](https://discuss.pynq.io/u/marioruiz)\
**Post date:** [October 3, 2025, 10:25am UTC](https://discuss.pynq.io/t/no-video-output-on-monitor-with-custom-hdmi-passthrough-design-on-pynq-z1/8792/2 "2025-10-03T10:25:34Z")

</div>

Hi @koya1208,

Welcome to the PYNQ community.

A screenshot of your block diagram would be useful. Also note that this issue can be caused if the AXI4-Stream channel does not have all the necessary signals, tuser, tlast.

Mario
