# PYNQ-Z2 can't boot "DRAM：ECC disabled 512 MiB"
**URL:** https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814
**Category:** Support
**Created:** [January 2, 2020, 9:15am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814 "2020-01-02T09:15:12Z")
**Posts on this page:** 7
**Page:** 1
### Author:  [@AllenChenChao](https://discuss.pynq.io/u/AllenChenChao)
#### Post date: [January 2, 2020, 9:15am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/1 "2020-01-02T09:15:12Z")
U-Boot 2016.07-00001-ge2382ce (Feb 15 2018 - 12:03:51 -0700)
Model: Zynq ARTY Z7 Development Board
Board: Xilinx Zynq
I2C: ready
DRAM: ECC disabled 512 MiB
MMC: sdhci@e0100000: 0
SF: Detected S25FL128S\_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
\*\*\* Warning - bad CRC, using default environment
In: serial@e0000000
Out: serial@e0000000
Err: serial@e0000000
Model: Zynq ARTY Z7 Development Board
Board: Xilinx Zynq
Net: ZYNQ GEM: e000b000, phyaddr 1, interface rgmii-id
SF: Detected S25FL128S\_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Warning: ethernet@e000b000 using MAC address from ROM
eth0: ethernet@e000b000
reading uEnv.txt
259 bytes read in 9 ms (27.3 KiB/s)
Importing environment from mmc …
Checking if uenvcmd is set …
Hit any key to stop autoboot: 0
Device: sdhci@e0100000
Manufacturer ID: 3
OEM: 5344
Name: SC16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
UENV Copying Linux from SD to RAM…
reading uImage
4665336 bytes read in 405 ms (11 MiB/s)
reading devicetree.dtb
9942 bytes read in 17 ms (570.3 KiB/s)
## Booting kernel from Legacy Image at 03000000 …
Image Name: Linux-4.9.0-xilinx
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 4665272 Bytes = 4.4 MiB
Load Address: 02080000
Entry Point: 02080000
Verifying Checksum … OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x2a00000
Loading Kernel Image … OK
Loading Device Tree to 1eb1a000, end 1eb1f6d5 … OK
Starting kernel …
Booting Linux on physical CPU 0x0
Linux version 4.9.0-xilinx (yunq@xcopynqbuild1) (gcc version 6.2.1 20161114 (Linaro GCC Snapshot 6.2-2016.11) ) #1 SMP PREEMPT Wed Feb 14 13:14:03 MST 2018
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt:Machine model: xlnx,zynq-7000
cma: Reserved 128 MiB at 0x16800000
Memory policy: Data cache writealloc
percpu: Embedded 14 pages/cpu @5fb93000 s26188 r8192 d22964 u57344
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 uio\_pdrv\_genirq.of\_id=“generic-uio”
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 375796K/524288K available (7168K kernel code, 360K rwdata, 2008K rodata, 1024K init, 351K bss, 17420K reserved, 131072K cma-reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0x60800000 - 0xff800000 (2544 MB)
lowmem : 0x40000000 - 0x60000000 ( 512 MB)
pkmap : 0x3fe00000 - 0x40000000 ( 2 MB)
modules : 0x3f000000 - 0x3fe00000 ( 14 MB)
.text : 0x40008000 - 0x40800000 (8160 kB)
.init : 0x40b00000 - 0x40c00000 (1024 kB)
.data : 0x40c00000 - 0x40c5a1b8 ( 361 kB)
.bss : 0x40c5a1b8 - 0x40cb2004 ( 352 kB)
Preemptible hierarchical RCU implementation.
Build-time adjustment of leaf fanout to 32.
RCU restricting CPUs from NR\_CPUS=4 to nr\_cpu\_ids=2.
RCU: Adjusting geometry for rcu\_fanout\_leaf=32, nr\_cpu\_ids=2
NR\_IRQS:16 nr\_irqs:16 16
efuse mapped to 60800000
slcr mapped to 60802000
L2C: platform modifies aux control register: 0x72360000 → 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 → 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE\_ID 0x410000c8, AUX\_CTRL 0x76760001
zynq\_clock\_init: clkc starts at 60802100
Zynq clock init
sched\_clock: 64 bits at 325MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm\_global\_timer: mask: 0xffffffffffffffff max\_cycles: 0x4af477f6aa, max\_idle\_ns: 440795207830 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc\_clocksource: mask: 0xffff max\_cycles: 0xffff, max\_idle\_ns: 551318127 ns
timer #0 at 6080a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 650.00 BogoMIPS (lpj=3250000)
pid\_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100058
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (1300.00 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max\_cycles: 0xffffffff, max\_idle\_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0x60840000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0000000.serial: ttyPS0 at MMIO 0xe0000000 (irq = 25, base\_baud = 6250000) is a xuartps
console [ttyPS0] enabled
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
media: Linux media interface: v0.10
Linux video capture interface: v2.00
pps\_core: LinuxPPS API ver. 1 registered
pps\_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [giometti@linux.it](mailto:giometti@linux.it)
PTP clock support registered
EDAC MC: Ver: 3.0.0
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm\_global\_timer
NET: Registered protocol family 2
TCP established hash table entries: 4096 (order: 2, 16384 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: enabled with armv7\_cortex\_a9 PMU driver, 7 counters available
futex hash table entries: 512 (order: 3, 32768 bytes)
workingset: timestamp\_bits=30 max\_order=17 bucket\_order=0
jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num\_Chans-8 Num\_Peri-4 Num\_Events-16
xdevcfg f8007000.devcfg: ioremap 0xf8007000 to 6082a000
[drm] Initialized
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
CAN device driver interface
libphy: MACB\_mii\_bus: probed
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (00:05:6b:00:bb:05)
Generic PHY e000b000.etherne:01: attached PHY driver [Generic PHY] (mii\_bus:phy\_addr=e000b000.etherne:01, irq=-1)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
Broadcom 43xx driver loaded [Features: PN]
Broadcom 43xx-legacy driver loaded [Features: PID]
usbcore: registered new interface driver brcmfmac
usbcore: registered new interface driver rtl8187
usbcore: registered new interface driver rtl8192cu
ehci\_hcd: USB 2.0 ‘Enhanced’ Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
ehci-platform: EHCI generic platform driver
usbcore: registered new interface driver usb-storage
e0002000.usb supply vbus not found, using dummy regulator
ULPI transceiver vendor/product ID 0x0451/0x1507
Found TI TUSB1210 ULPI transceiver.
ULPI integrity check: passed.
ci\_hdrc ci\_hdrc.0: doesn’t support gadget
ci\_hdrc ci\_hdrc.0: EHCI Host Controller
ci\_hdrc ci\_hdrc.0: new USB bus registered, assigned bus number 1
ci\_hdrc ci\_hdrc.0: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 4.9.0-xilinx ehci\_hcd
usb usb1: SerialNumber: ci\_hdrc.0
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
---
### Author:  [@PeterOgden](https://discuss.pynq.io/u/PeterOgden)
#### Post date: [January 3, 2020, 6:43pm UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/2 "2020-01-03T18:43:15Z")
Do you have anything plugged into the USB port and how are you powering the board? This looks like the board is resetting due to a loss of power at the time the USB ports are initialised.
Peter
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### Author:  [@Colorado\_Rob](https://discuss.pynq.io/u/Colorado_Rob)
#### Post date: [January 4, 2020, 4:02am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/3 "2020-01-04T04:02:34Z")
Your subject line says “PYNQ-Z2 can’t boot” but the boot message says “Model: Zynq ARTY Z7 Development Board”.
Do you have the correct boot image?
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### Author:  [@AllenChenChao](https://discuss.pynq.io/u/AllenChenChao)
#### Post date: [April 28, 2020, 10:46am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/4 "2020-04-28T10:46:23Z")
> [@PeterOgden](#):
>
> SB port and how are you powering the board? This looks like the board is resetting due to a loss of power at the time the USB ports are initialised.
yeap,I use the urat port to power the pynq booard
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### Author:  [@AllenChenChao](https://discuss.pynq.io/u/AllenChenChao)
#### Post date: [April 28, 2020, 10:48am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/5 "2020-04-28T10:48:42Z")
thank your for your careful observation.
I am not sure why it happeded,maybe I try to link pynq with an arty-a7 project and lead this Error.
I try to reload a new image in version 2.5 for pynq-z2 board.It my help.
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### Author:  [@rock](https://discuss.pynq.io/u/rock)
#### Post date: [April 28, 2020, 5:22pm UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/6 "2020-04-28T17:22:44Z")
I think you should use a power brick to power the board- you USB may not provide sufficient power.
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### Author:  [@cathalmccabe](https://discuss.pynq.io/u/cathalmccabe)
#### Post date: [April 29, 2020, 8:08am UTC](https://discuss.pynq.io/t/pynq-z2-cant-boot-dram-ecc-disabled-512-mib/814/7 "2020-04-29T08:08:34Z")
Some USB ports don’t supply enough power, and on some machines, the ports can switch to a lower power state. E.g. on my laptop I can normally power from a USB port. However, if I disconnect the power supply and run from battery, the USB ports switch to a low power mode which is not enough to run the board.
You could also try connecting to a USB power socket if you don’t have a power brick for your board.
Cathal