# Something Weird: HDMI cannot write frames continuously

**URL:** <https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042>\
**Category:** Support\
**Created:** [March 19, 2020, 1:07am UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042 "2020-03-19T01:07:40Z")\
**Posts on this page:** 7\
**Page:** 2

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**Author:** ![neocsc](https://avatars.discourse-cdn.com/v4/letter/n/898d66/32.png) [@neocsc](https://discuss.pynq.io/u/neocsc)\
**Post date:** [March 31, 2020, 4:21pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/21 "2020-03-31T16:21:40Z")

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Hi @rock, you have been very helpful.

I also tried to put 200MHz straight from the PS. I don’t know what is going on. I am enclosing bitstream, xdc, hwh and tcl. I don’t really know how to proceed at the moment.

Thank you.  
[base\_zybo.zip](https://discuss.pynq.io/uploads/short-url/59boHokbRIBAW3b0X9e2V1EhK6F.zip) (576.8 KB)

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**Author:** ![rock](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/rock/32/32_2.png) [@rock](https://discuss.pynq.io/u/rock)\
**Post date:** [March 31, 2020, 5:15pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/22 "2020-03-31T17:15:20Z")

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I checked the block design; nothing caught my eyes. How did you build your zybo image? Is the UIO block added to the device tree as Pynq-Z1 and Pynq-Z2? Do you mind sharing your zybo board repo?

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**Author:** ![neocsc](https://avatars.discourse-cdn.com/v4/letter/n/898d66/32.png) [@neocsc](https://discuss.pynq.io/u/neocsc)\
**Post date:** [March 31, 2020, 5:50pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/23 "2020-03-31T17:50:49Z")

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[base\_zybo.zip](https://discuss.pynq.io/uploads/short-url/59boHokbRIBAW3b0X9e2V1EhK6F.zip) (576.8 KB) I don’t know if I added the UIO block. Not that I remember. I used the prebuilt board-agnostic image ( **make PREBUILT="path\_to\_image BOARDS=zybo\_repo\_dir** ). Petalinux bsp was generated as follows:

```
/include/ "system-conf.dtsi"

```

/ {

```
    model = "Zynq Zybo Z7 Development Board";
compatible = "digilent,zynq-zyboz7", "xlnx,zynq-7000";

chosen {
    bootargs = "console=ttyPS0,115200 earlyprintk uio_pdrv_genirq.of_id=generic-uio";
};

usb_phy0: usb_phy@0 {
    compatible = "ulpi-phy";
    #phy-cells = <0>;
    reg = <0xe0002000 0x1000>;
    view-port = <0x0170>;
    drv-vbus;
};

```

};

&usb0 {  
dr\_mode = “host”;  
usb-phy = \<&usb\_phy0\>;  
};

I also added **wifi.cfg** (just copyed from PYNQ repo) to the recipes kernel. The bitstream ( **base.bit** is just an hls adder exactly the same as the one found here: [Overlay Tutorial — Python productivity for Zynq (Pynq) v1.0](https://pynq.readthedocs.io/en/v2.3/overlay_design_methodology/overlay_tutorial.html))

I can also share the board repo (base.bit, bsp and specs).  
Thank you @rock.

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**Author:** ![rock](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/rock/32/32_2.png) [@rock](https://discuss.pynq.io/u/rock)\
**Post date:** [April 1, 2020, 2:22am UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/24 "2020-04-01T02:22:43Z")

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I think the bsp is good now. There might be still something different between pynq-z2 and zybo. Maybe you want to compare the 2 tcl files used to build the block designs on these platforms.

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**Author:** ![neocsc](https://avatars.discourse-cdn.com/v4/letter/n/898d66/32.png) [@neocsc](https://discuss.pynq.io/u/neocsc)\
**Post date:** [April 2, 2020, 5:15pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/25 "2020-04-02T17:15:45Z")

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Thank you @rock. I also tried to port a running project from Zybo to the PYNQ but I am getting some problems. The design is based in this reference ([Zybo Z7 HDMI Input/Output Demo - Digilent Reference](https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-hdmi-demo/start)) from digilent and is working in standalone mode.

> [@neocsc](#):
>
> However, if I try to load the IP blocks, I have a problem as follows:  
> **base.video.hdmi\_in.axi\_gpio\_video?**  
> **Object `base.video.hdmi_in.axi_gpio_video` not found.**  
> I can only load the axi\_dynclk.  
> Could you please help? I don’t understand the issue.
> 
> I am enclosing a zip folder with the bitstream and hwh.

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**Author:** ![cathalmccabe](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/cathalmccabe/32/3348_2.png) [@cathalmccabe](https://discuss.pynq.io/u/cathalmccabe)\
**Post date:** [April 2, 2020, 5:42pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/26 "2020-04-02T17:42:59Z")

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I tried answer this already. The PYNQ Python class for the video system for the Z2 board is controlling the IP in the video subsystem. This won’t work for the design for the Zybo as the video subsystem is different, i.e. it has different IP. This is why you get the object not found.

We don’t have that Zybo to test the video design. This is complicated as you are outside the spec for the HDMI. (By the way, your updated clock constraint is wrong for the edge, but I’m not sure how much difference that would make.) Slight P&R differences could be making a difference.

Does the “PYNQ” design work at 720p on the Zybo?

Cathal

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<div class="post-metadata">

**Author:** ![neocsc](https://avatars.discourse-cdn.com/v4/letter/n/898d66/32.png) [@neocsc](https://discuss.pynq.io/u/neocsc)\
**Post date:** [April 2, 2020, 6:04pm UTC](https://discuss.pynq.io/t/something-weird-hdmi-cannot-write-frames-continuously/1042/27 "2020-04-02T18:04:18Z")

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Thank you @cathalmccabe. The Zybo does not work either for 720p neither 1080p.  
I don’t understand why the object is not found but it is shown in ip\_dict.  
Also, I made a simple project with Zynq Processor, DVI2RGB, RGB2DVI and AXI\_GPIO. And I can access the AXI\_GPIO and assert hdmi\_in\_hpd and video is shown. But with that HDMI reference I have this problem.

I am attaching the pdf design block of the project that works (I just assert hdmi\_in\_hpd to one and video starts streaming, differently from HDMI reference).  
[design\_1.pdf](https://discuss.pynq.io/uploads/short-url/nk5jAYFroYUoOpk258FwafnplAO.pdf) (82.4 KB)

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