# Using DDR4 RAM for dac\_player

**URL:** <https://discuss.pynq.io/t/using-ddr4-ram-for-dac-player/7749>\
**Category:** Support\
**Created:** [November 18, 2024, 5:12pm UTC](https://discuss.pynq.io/t/using-ddr4-ram-for-dac-player/7749 "2024-11-18T17:12:25Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![m.anbiyaei](https://sea1.discourse-cdn.com/flex019/user_avatar/discuss.pynq.io/m.anbiyaei/32/6353_2.png) [@m.anbiyaei](https://discuss.pynq.io/u/m.anbiyaei)\
**Post date:** [November 18, 2024, 5:12pm UTC](https://discuss.pynq.io/t/using-ddr4-ram-for-dac-player/7749/1 "2024-11-18T17:12:25Z")

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I am using the RFSoC 4x2 with the RFSoC\_MTS project to generate waveforms in MATLAB. After converting the waveforms to CSV, I transmit them by assigning them to `ol.dac_player`. However, due to the size limitations of the BRAM, I want to stream data from the DDR4 RAM to the DAC. Is there a sample design available for this purpose, or can someone provide guidance on modifying the RFSoC\_MTS design to achieve this?