/****************************************************************************** * * Copyright (C) 2010 - 2017 Xilinx, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Except as contained in this notice, the name of the Xilinx shall not be used * in advertising or otherwise to promote the sale, use or other dealings in * this Software without prior written authorization from Xilinx. * ******************************************************************************/ /*****************************************************************************/ /** * * @file xaxidma_example_simple_poll.c * * This file demonstrates how to use the xaxidma driver on the Xilinx AXI * DMA core (AXIDMA) to transfer packets in polling mode when the AXI DMA core * is configured in simple mode. * * This code assumes a loopback hardware widget is connected to the AXI DMA * core for data packet loopback. * * To see the debug print, you need a Uart16550 or uartlite in your system, * and please set "-DDEBUG" in your compiler options. You need to rebuild your * software executable. * * Make sure that MEMORY_BASE is defined properly as per the HW system. The * h/w system built in Area mode has a maximum DDR memory limit of 64MB. In * throughput mode, it is 512MB. These limits are need to ensured for * proper operation of this code. * * *
 * MODIFICATION HISTORY:
 *
 * Ver   Who  Date     Changes
 * ----- ---- -------- -------------------------------------------------------
 * 4.00a rkv  02/22/11 New example created for simple DMA, this example is for
 *       	       simple DMA
 * 5.00a srt  03/06/12 Added Flushing and Invalidation of Caches to fix CRs
 *		       648103, 648701.
 *		       Added V7 DDR Base Address to fix CR 649405.
 * 6.00a srt  03/27/12 Changed API calls to support MCDMA driver.
 * 7.00a srt  06/18/12 API calls are reverted back for backward compatibility.
 * 7.01a srt  11/02/12 Buffer sizes (Tx and Rx) are modified to meet maximum
 *		       DDR memory limit of the h/w system built with Area mode
 * 7.02a srt  03/01/13 Updated DDR base address for IPI designs (CR 703656).
 * 9.1   adk  01/07/16 Updated DDR base address for Ultrascale (CR 799532) and
 *		       removed the defines for S6/V6.
 * 9.3   ms   01/23/17 Modified xil_printf statement in main function to
 *                     ensure that "Successfully ran" and "Failed" strings are
 *                     available in all examples. This is a fix for CR-965028.
 *       ms   04/05/17 Modified Comment lines in functions to
 *                     recognize it as documentation block for doxygen
 *                     generation of examples.
 * 
* * *************************************************************************** */ /***************************** Include Files *********************************/ #include "xaxidma.h" #include "xparameters.h" #include "xdebug.h" #if defined(XPAR_UARTNS550_0_BASEADDR) #include "xuartns550_l.h" /* to use uartns550 */ #endif /******************** Constant Definitions **********************************/ /* * Device hardware build related constants. */ #define DMA_DEV_ID XPAR_AXIDMA_0_DEVICE_ID #ifdef XPAR_AXI_7SDDR_0_S_AXI_BASEADDR #define DDR_BASE_ADDR XPAR_AXI_7SDDR_0_S_AXI_BASEADDR #elif XPAR_MIG7SERIES_0_BASEADDR #define DDR_BASE_ADDR XPAR_MIG7SERIES_0_BASEADDR #elif XPAR_MIG_0_BASEADDR #define DDR_BASE_ADDR XPAR_MIG_0_BASEADDR #elif XPAR_PSU_DDR_0_S_AXI_BASEADDR #define DDR_BASE_ADDR XPAR_PSU_DDR_0_S_AXI_BASEADDR #endif #ifndef DDR_BASE_ADDR #warning CHECK FOR THE VALID DDR ADDRESS IN XPARAMETERS.H, \ DEFAULT SET TO 0x01000000 #define MEM_BASE_ADDR 0x01000000 #else #define MEM_BASE_ADDR (DDR_BASE_ADDR + 0x1000000) #endif #define TX_BUFFER_BASE (MEM_BASE_ADDR + 0x00100000) #define RX_BUFFER_BASE (MEM_BASE_ADDR + 0x00300000) #define RX_BUFFER_HIGH (MEM_BASE_ADDR + 0x004FFFFF) #define MAX_PKT_LEN 0x20 #define TEST_START_VALUE 0xC #define NUMBER_OF_TRANSFERS 10 /**************************** Type Definitions *******************************/ /***************** Macros (Inline Functions) Definitions *********************/ /************************** Function Prototypes ******************************/ #if (!defined(DEBUG)) extern void xil_printf(const char *format, ...); #endif int XAxiDma_SimplePollExample(u16 DeviceId); static int CheckData(void); /************************** Variable Definitions *****************************/ /* * Device instance definitions */ XAxiDma AxiDma; /*****************************************************************************/ /** * The entry point for this example. It invokes the example function, * and reports the execution status. * * @param None. * * @return * - XST_SUCCESS if example finishes successfully * - XST_FAILURE if example fails. * * @note None. * ******************************************************************************/ int main() { int Status; xil_printf("\r\n--- Entering main() --- \r\n"); /* Run the poll example for simple transfer */ Status = XAxiDma_SimplePollExample(DMA_DEV_ID); if (Status != XST_SUCCESS) { xil_printf("XAxiDma_SimplePoll Example Failed\r\n"); return XST_FAILURE; } xil_printf("Successfully ran XAxiDma_SimplePoll Example\r\n"); xil_printf("--- Exiting main() --- \r\n"); return XST_SUCCESS; } #if defined(XPAR_UARTNS550_0_BASEADDR) /*****************************************************************************/ /* * * Uart16550 setup routine, need to set baudrate to 9600, and data bits to 8 * * @param None. * * @return None * * @note None. * ******************************************************************************/ static void Uart550_Setup(void) { /* Set the baudrate to be predictable */ XUartNs550_SetBaud(XPAR_UARTNS550_0_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600); XUartNs550_SetLineControlReg(XPAR_UARTNS550_0_BASEADDR, XUN_LCR_8_DATA_BITS); } #endif /*****************************************************************************/ /** * The example to do the simple transfer through polling. The constant * NUMBER_OF_TRANSFERS defines how many times a simple transfer is repeated. * * @param DeviceId is the Device Id of the XAxiDma instance * * @return * - XST_SUCCESS if example finishes successfully * - XST_FAILURE if error occurs * * @note None * * ******************************************************************************/ int XAxiDma_SimplePollExample(u16 DeviceId) { XAxiDma_Config *CfgPtr; int Status; int Tries = NUMBER_OF_TRANSFERS; int Index; u8 *TxBufferPtr; u8 *RxBufferPtr; u8 Value; TxBufferPtr = (u8 *)TX_BUFFER_BASE ; RxBufferPtr = (u8 *)RX_BUFFER_BASE; /* Initialize the XAxiDma device. */ CfgPtr = XAxiDma_LookupConfig(DeviceId); if (!CfgPtr) { xil_printf("No config found for %d\r\n", DeviceId); return XST_FAILURE; } Status = XAxiDma_CfgInitialize(&AxiDma, CfgPtr); if (Status != XST_SUCCESS) { xil_printf("Initialization failed %d\r\n", Status); return XST_FAILURE; } if(XAxiDma_HasSg(&AxiDma)){ xil_printf("Device configured as SG mode \r\n"); return XST_FAILURE; } /* Disable interrupts, we use polling mode */ XAxiDma_IntrDisable(&AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DEVICE_TO_DMA); XAxiDma_IntrDisable(&AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DMA_TO_DEVICE); Value = TEST_START_VALUE; for(Index = 0; Index < MAX_PKT_LEN; Index ++) { TxBufferPtr[Index] = Value; Value = (Value + 1) & 0xFF; } /* Flush the SrcBuffer before the DMA transfer, in case the Data Cache * is enabled */ Xil_DCacheFlushRange((UINTPTR)TxBufferPtr, MAX_PKT_LEN); #ifdef __aarch64__ Xil_DCacheFlushRange((UINTPTR)RxBufferPtr, MAX_PKT_LEN); #endif for(Index = 0; Index < Tries; Index ++) { Status = XAxiDma_SimpleTransfer(&AxiDma,(UINTPTR) RxBufferPtr, MAX_PKT_LEN, XAXIDMA_DEVICE_TO_DMA); if (Status != XST_SUCCESS) { return XST_FAILURE; } Status = XAxiDma_SimpleTransfer(&AxiDma,(UINTPTR) TxBufferPtr, MAX_PKT_LEN, XAXIDMA_DMA_TO_DEVICE); if (Status != XST_SUCCESS) { return XST_FAILURE; } while ((XAxiDma_Busy(&AxiDma,XAXIDMA_DEVICE_TO_DMA)) || (XAxiDma_Busy(&AxiDma,XAXIDMA_DMA_TO_DEVICE))) { /* Wait */ } Status = CheckData(); if (Status != XST_SUCCESS) { return XST_FAILURE; } } /* Test finishes successfully */ return XST_SUCCESS; } /*****************************************************************************/ /* * * This function checks data buffer after the DMA transfer is finished. * * @param None * * @return * - XST_SUCCESS if validation is successful. * - XST_FAILURE otherwise. * * @note None. * ******************************************************************************/ static int CheckData(void) { u8 *RxPacket; int Index = 0; u8 Value; RxPacket = (u8 *) RX_BUFFER_BASE; Value = TEST_START_VALUE; /* Invalidate the DestBuffer before receiving the data, in case the * Data Cache is enabled */ #ifndef __aarch64__ Xil_DCacheInvalidateRange((UINTPTR)RxPacket, MAX_PKT_LEN); #endif for(Index = 0; Index < MAX_PKT_LEN; Index++) { if (RxPacket[Index] != Value) { xil_printf("Data error %d: %x/%x\r\n", Index, (unsigned int)RxPacket[Index], (unsigned int)Value); return XST_FAILURE; } Value = (Value + 1) & 0xFF; } return XST_SUCCESS; }