PYNQ3.0.1 allocate ddr4 returns buffer outside of address range

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I had a feeling I had to change the register values but wasn’t sure about the specification. Thanks for walking me through that :slightly_smiling_face:. I updated the values to <0x05 0x00 0x01 0x00> as suggested and it’s working! I added it to pynq-venv.sh following what’s done in the Kria repo and now it’s all working as normal. Thanks so much for your help with this! I will repost step by step instructions below:

In an ssh terminal to the board:

  1. activate the pynq virtual environment source /etc/profile.d/pynq_venv.sh
  2. install the device-tree-compiler sudo apt-get install device-tree-compiler
  3. download the Kria-PYNQ repo dts folder
  4. edit pynq.dts replacing the entire contents of the file with
/dts-v1/;
/plugin/;
/ {
        /*reserved memory*/
        fragment@4 {
                target-path = "/";
                overlay4: __overlay__ {
                        reserved-memory {
                                ranges;
                                reserved {
                                        reg = <0x10 0x00 0x02 0x00>;
                                };
                        };
                };            
        };
};

The reg field should be updated like so:
The first value is the upper 32-bits of the PL DDR4 base address. For example if the base address is 0x500000000 this value should be 0x500000000 >> 32 = 0x5 represented as a 32-bit number so 0x05 . The second value is the lower 32-bits of the PL DDR4 base address ex: 0x500000000 & 2^32-1 = 0x0 represented as a 32-bit number so 0x00 . The third and fourth values are the upper and lower 32 bits of the allowed memory range. For example if the PL DDR4 base address is at 0x500000000 and it is 4 GiB, the high address is 0x5ffffffff . The allowed range is 0x5ffffffff-0x500000000+1 = 0x100000000 . The high bits are 0x01 and the low bits are 0x00 so for this example the reg field would read: reg = <0x05 0x00 0x01 0x00> .
5. in the dts folder run make to compile the pynq.dts into pynq.dtbo
6. Make a folder in the pynq-venv for the dts products mkdir -p /usr/local/share/pynq-venv/pynq-dts/
7. copy the insert_dtbo and .dtbo to the folder cp insert_dtbo.py pynq.dtbo /usr/local/share/pynq-venv/pynq-dts/
8. append the insert script to the pynq virtual environment startup script echo "python3 /usr/local/share/pynq-venv/pynq-dts/insert_dtbo.py" >> /etc/profile.d/pynq_venv.sh

I sort of guessed at the permissions I made insert_dtbo.py, pynq.dtbo, and pynq-dts/ all belong to root and executable using sudo chown root: <files> and sudo chmod 755 <files>.

Power cycled and now I am able to allocate the PL DDR4 as normal:

import pynq
from pynq import Overlay

ol = Overlay('design_with_mig.bit', ignore_version=True)
ol.download()

buffer = pynq.allocate((2**19, 2), dtype='i2', target=ol.capture.ddr4_0)

hex(buffer.device_address)
>>'0x500000000'
hex(ol.capture.ddr4_0.base_address)
>>'0x500000000'
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