PYNQ: PYTHON PRODUCTIVITY

Support


Topic Replies Views Activity
Read Me: How to ask a question on the forum, and FAQs

How to post a question on the PYNQ forums This post is intended to cover information you should include when posting a question on the forums, to help you get a better/faster response to your issue. Please include as mu…

0 279 March 25, 2020
About the Support category
0 254 April 3, 2019
Read this before posting

When posting support requests, please include the following information: PYNQ version you are using Your board Full details of the error message you see, or a detailed description of the problem you experience. Steps t…

1 415 May 8, 2019
Why does HDMI don't use DRM?
1 7 January 24, 2021
Custom PYNQ board/image won't configure (PL?) properly
0 5 January 24, 2021
Control ap_ctrl_hs though overlay
3 27 January 23, 2021
RuntimeError: Root permission needed by the library
0 6 January 23, 2021
How to use PYNQ to read a GPIO value continuously？
5 48 January 23, 2021
Pynq 2.6 - DMA infos?
0 14 January 22, 2021
Vitis vision core fails on PYNQ V2.5.1
18 285 January 22, 2021
Low-cost PYNQ Board with VCU core
2 31 January 22, 2021
ZCU104 - Yocto/bitbake Pynq 2.6
3 24 January 20, 2021
ZCU104 Internet Issue Continuation and Solution
1 15 January 20, 2021
Connecting to the internet - Zynq 104
6 107 December 15, 2020
Plotly dependency conflict
9 96 January 19, 2021
Base Overlay Generate Bitstream Fail - PYNQ 2.5 - Vivado 2019.1
1 23 January 18, 2021
Problem with ethernet when porting toZybo Z7-10 with Petalinux 2020.1
0 16 January 17, 2021
Best Affordable Board for Software Defined Radio (SDR)?
2 34 January 17, 2021
How to use axi interface created by HLS correctly?
1 27 January 17, 2021
Multiple DMAs, But only one work
3 29 January 17, 2021
ZCU104 & v2.6 image - does it work?
0 22 January 17, 2021
chipKIT Utilization
0 24 January 14, 2021
Ultra96 pynq vitis ai
2 47 January 14, 2021
Can't find the axi IP we creat from HLS&vivado tools
1 24 January 14, 2021
Documentation of HLS interfaces
14 90 January 13, 2021
Cannot Creat HDL wrapper successfully, there is an error: [BD 41-758] The following clock pins are not connected to a valid clock source: /processing_system7_0/M_AXI_GP0_ACLK
0 9 January 13, 2021
ZCU111 DAC loopback problem
0 26 January 12, 2021
PYNQ hangs during HDMI initialization
0 23 January 11, 2021
Could we use axi in hls lile axilite in pynq very easy?
0 24 January 11, 2021
How to use PYNQ to read the high frequency value from GPIO continuously?
1 40 January 11, 2021