PYNQ: PYTHON PRODUCTIVITY

DPU-PYNQ dexplorer output

Hi!

When working with dpu_inception_v1.ipynb I have seen that !dexplorer -w has the next output:

[DPU IP Spec]
IP  Timestamp            : 2020-03-26 13:30:00
DPU Core Count           : 1

[DPU Core Configuration List]
DPU Core                 : #0
DPU Enabled              : Yes
DPU Arch                 : B1600
DPU Target Version       : v1.4.1
DPU Freqency             : 300 MHz
Ram Usage                : Low
DepthwiseConv            : Enabled
DepthwiseConv+Relu6      : Enabled
Conv+Leakyrelu           : Enabled
Conv+Relu6               : Enabled
Channel Augmentation     : Disabled
Average Pool             : Enabled

The design by default uses 150/300MHz but I don’t understand why dexplorer says that DPU Frequency is 300 Mhz, it shouldn’t be 150Mhz since this is the dpu clock? 300MHz is not 2xdpu clock?

I am looking in the software ug1414-vitis-ai.pdf page 115 and DPU Frequency is equal to 325 MHz and having an arquitecture of B4096 I think that the DPU design is built with 325/650 Mhz.

Also I have created new designs with new architectures like B2304 and 300/600 MHz but when I call dexplorer this output remains the same as above, doesn’t change.

Can you help me to understand this dexplorer behaviour?

Best regards and thank you!

Okay, I might be wrong earlier. What was the original DPU frequency shown there before you used you own? On Ultra96, was that 150MHz? If so, please ignore my other comments - it should be the 1x DPU clock frequency - should show 150 in case of 150/300.

For the dexplorer output to change, I think you need both dpu.bit, dpu.hwh, and dpu.xclbin to be sitting in the same folder. By the way, what Vitis platform do you use?

I am using Ultra96 v2 platform the one that you provide because I am following the tutorials in DPU-PYNQ repo.

I have never seen 150MHz in dexplorer output it is always 300MHz.

dpu.bit, dpu.hwh, and dpu.xclbin are in the same path yes.

Regards.

Ok, maybe the executable there has made some assumptions that the first clock in the system is 300MHz. The dexplorer binary is reading some register value from the DPU IP; I am guessing the register value will just show which clock the DPU IP is connected to; then it reports out the frequency based on the clock index. Since ultra96v2 has used a customized platform, clock 1 is 150MHz instead of 300MHz, which makes the dexplorer not functioning properly. Other register values might be correct though - number of cores, enable/disable of some configurations, etc.

So you can ignore that clock value as long as you have provided bit, hwh, and xclbin.

With the architecture happens the same is always B1600 and I have changed it to B2304 in dpu_conf.vh when I create a custom design