Handling Arrays in C++ Functions on PYNQ: Address Offsets and Memory Access in Jupyter Notebook

I am using a PYNQ board to accelerate a function with arrays as input and output. I wrote the code in C++ using Vitis 2024, generated an IP block, integrated it into a block design in Vivado, generated the bitstream, and used it in a Jupyter notebook.

When I use simple examples of C++ functions with integers as input and output, I can see the register offset addresses of the variables (from S_AXI_LITE) in the generated TCL file. This allows me to write into the addresses from the Jupyter notebook. However, when I use arrays as input and output in my C++ code, the generated bitstream’s TCL file does not contain address offsets for the arrays, and parts of the code show “failed.”

  1. How should I write my C++ code to handle arrays as input and output such that the address offsets are correctly generated and accessible in the TCL file?
  2. How can I write an array into memory addresses from Python in a Jupyter notebook for this setup?

Hi,
Can you please show the block Vivado design you are using?
Isn’t the protocol AXI_LITE for transmiting configuration data and not variables?


I am not very familiar with the AXI-Lite protocol and would appreciate any guidance, examples, or resources for implementing this.
I have followed an Youtube Lecture which does something like this for handling lab_1.cpp file is "# include “lab_1.h”

void lab_1(data_t A,data_t B,data_t C, data_t &Y){
#pragma HLS INTERFACE mode=s_axilite port=A
#pragma HLS INTERFACE mode=s_axilite port=B
#pragma HLS INTERFACE mode=s_axilite port=C
#pragma HLS INTERFACE mode=s_axilite port=Y
#pragma HLS INTERFACE mode=ap_ctrl_none port=return
Y = 2*A+B-C;
}" and lab_1.h file is "# ifndef _LAB_1

define _LAB_1

include <ap_int.h>

typedef ap_int<32> data_t;

void lab_1(data_t A,data_t B,data_t C, data_t &Y);

#endif
" Using this, I can view the register addresses in the generated TCL file (via S_AXI_LITE) and write values into the addresses from a Jupyter notebook.

When I extend this approach to use arrays as inputs and outputs, the generated TCL file does not show address offsets for the arrays, and some parts of the file indicate "failed.

  1. How can I modify my C++ code to work with arrays as inputs and outputs while ensuring address offsets for the arrays are properly generated?
  2. How can I write and read arrays into/from memory addresses in Python (using Jupyter notebooks) for this setup?

What is the function using arrays you want to accelerate?

Could you please provide the jupyter notebook you used to test your bitstream? And what error was displayed?

Could you please also indicates the youtube video you used to create this block in C++ via Vitis?
Why is there a “Y=2*A+B-C” in that code?

Hi @Saranathan,

When using arrays in you need to check the offsets in the driver (search for a driver directory inside of the Vitis HLS project) code that is automatically generated by Vitis HLS.

Unfortunately, this information is not embedded in the IP.

Mario

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Thanks @marioruiz, Now i am able to read the array’s and write into array’s.

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Hi @Saranathan,

If your issue is solved, please mark my answer as correct or provide the solution so someone else can benefit from it as well.

Mario

Will do, so there is the .h file in the driver folder as you mentioned, and I am able to find the base address of my Array. I work with array by using write command in python which is able to write 4 bytes of data onto the given offset address. So I write in multiple of 4 bytes into the array. If anyone have a better idea of writing into the array’s please mention it below. I have uploaded the image of the .h file for reference.

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Hi @Saranathan,

The DefaultIP exposes the memory mapped registers in the .mmio numpy array.
So, you could do .mmio[7:10] = [<your array>] this will still issue write and read operations under the hood.

Mario

H be d b b d

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