IEEE 1588 Precision Time

Are there any projects or is anyone aware of any work done to get an IEEE 1588 Precision Time Protocol client running on PYNQ, either on the PS or PL side? I see there are some Linux projects and some proprietary IP out there and I don’t want to reinvent the wheel. Ideally I could use a guide to building ptp4l on the PS and then generating timestamps for the PL to use, but any relevant information would be appreciated.

Hey Steve,
This intrigues me as well, I would love to read your insights about the topic.
Were you able to get an external clock into one?

Regards,
Ido

Idos:

No, unfortunately I never found anything. We’ve moved our project away from PYNQ, we are now building custom boards with a single ARM processor, a Lattice iCE40 FPGA and an Ethernet IC.

Sorry,
-Steve

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I’d like to follow up with this question.
Is there a pynq-compatible board that supports hardware-level PTP syncing?

I’d like to query a PTP-synced clock from the FPGA and stamp sampled data from the ADC/DIO and then send this stamped information over Ethernet.

I was the OP and I never did find an answer to this. The solution we eventually arrived at involves a custom Ethernet board built around the Microchip VSC7511, a subset of the PTP protocol implemented on this IC’s internal processor (sorry, I’m not prepared to share this, so don’t ask), and a 16.384 MHz reference clock PPL’ed to a Pulse Per Second output from the VSC7511. You could probably achieve the same with a PTP capable PHY IC rather than an Ethernet switch IC, provided this PHY is connected to the PS.

Don’t expect to do all of this in PL. Keep in mind that PTP is a network protocol and it really requires a processor to run it. The FPGA can make use of a Pulse-Per-Second input and use internal counters to generate fractional second timestamps. This also means using the PPS as a frequency reference for the on-board clock.

There are Linux drivers for some PTP capable PHYs and ICs as well as a full implementation of IEEE1588v2. Integrating a PTP capably PHY with a Zynq should be feasible. I would advise anyone looking for a robust solution to go this route, but this is a very deep rabbit hole, you will want to allocate man-years of time and/or have some experienced embedded developers.

I have not investigated PTP support on other Xilinx devices and whether there’s overlap with Pynq, but since the question is being asked, I’m guessing this isn’t available.