RFSoC-PYNQ design flow

Firstly, I worked on a RFSoC 4x2 project where I tried to send complexes from a webcam of board A to board B via the analog ports. I was not able to finish this project, I had issues with analog frequency modulation in the reception. So I am not an expert of RFSoC 4x2.

Then:

  • even if you use real signals, the ADC will detect things and need a packaging block to formate what is the amplitude and the frequency. Even if the imaginary part is null, I think the receiver needs this packet generator block to understand what is the value of the real part in the frame received.

Why do you want to delete that packet generator? Reception seems to work with it. Modify reception after you designed a proper emission part (that requires a lot of work as there is like nothing in the base design, in the transmitter block).

“they did not detect the values” → values where in the wrong format. When I used the “transfer” function, the DMAs where empty (transfer is stuck to an infinite wait() ) while I had something before deleting the block.