Something Weird: HDMI cannot write frames continuously

Hi @cathalmccabe, I am trying to rebuild the video overlay as follows:

1.HDMI project demo (Zybo Z7 HDMI Input/Output Demo - Digilent Reference) works in standalone mode.
2. I export hwf and bit and when I load the overlay this is the output of

from pynq import Overlay

from pynq.lib.video import

base = Overlay(“/home/xilinx/pynq/overlays/video/video.bit”)
base?

Type: Overlay
String form: <pynq.overlay.Overlay object at 0xb3ab60b0>
File: /usr/local/lib/python3.6/dist-packages/pynq/overlay.py
Docstring:
Default documentation for overlay /home/xilinx/pynq/overlays/video2/video.bit. The following
attributes are available on this overlay:

IP Blocks

video/hdmi_in/axi_gpio_video : pynq.lib.axigpio.AxiGPIO
video/axi_vdma_0 : pynq.lib.video.dma.AxiVDMA
video/hdmi_in/v_tc_in : pynq.overlay.DefaultIP
video/hdmi_out/v_tc_out : pynq.overlay.DefaultIP
video/hdmi_out/axi_dynclk_0 : pynq.overlay.DefaultIP

Hierarchies

video : pynq.overlay.DefaultHierarchy
video/hdmi_in : pynq.overlay.DefaultHierarchy
video/hdmi_out : pynq.overlay.DefaultHierarchy

Interrupts

None

GPIO Outputs

None

Memories

processing_system7_0 : Memory

However, if I try to load the IP blocks, I have a problem as follows:
base.video.hdmi_in.axi_gpio_video?
Object base.video.hdmi_in.axi_gpio_video not found.
I can only load the axi_dynclk.
Could you please help? I don’t understand the issue.

I am enclosing a zip folder with the bitstream and hwh.

Thank you.
video.zip (437.8 KB)