Something Weird: HDMI cannot write frames continuously

Hi @rock, you have been very helpful.

I also tried to put 200MHz straight from the PS. I don’t know what is going on. I am enclosing bitstream, xdc, hwh and tcl. I don’t really know how to proceed at the moment.

Thank you.
base_zybo.zip (576.8 KB)

I checked the block design; nothing caught my eyes. How did you build your zybo image? Is the UIO block added to the device tree as Pynq-Z1 and Pynq-Z2? Do you mind sharing your zybo board repo?

base_zybo.zip (576.8 KB) I don’t know if I added the UIO block. Not that I remember. I used the prebuilt board-agnostic image (make PREBUILT="path_to_image BOARDS=zybo_repo_dir). Petalinux bsp was generated as follows:

/include/ "system-conf.dtsi"

/ {

    model = "Zynq Zybo Z7 Development Board";
compatible = "digilent,zynq-zyboz7", "xlnx,zynq-7000";

chosen {
    bootargs = "console=ttyPS0,115200 earlyprintk uio_pdrv_genirq.of_id=generic-uio";
};

usb_phy0: usb_phy@0 {
    compatible = "ulpi-phy";
    #phy-cells = <0>;
    reg = <0xe0002000 0x1000>;
    view-port = <0x0170>;
    drv-vbus;
};

};

&usb0 {
dr_mode = “host”;
usb-phy = <&usb_phy0>;
};

I also added wifi.cfg (just copyed from PYNQ repo) to the recipes kernel. The bitstream (base.bit is just an hls adder exactly the same as the one found here: Overlay Tutorial — Python productivity for Zynq (Pynq) v1.0)

I can also share the board repo (base.bit, bsp and specs).
Thank you @rock.

I think the bsp is good now. There might be still something different between pynq-z2 and zybo. Maybe you want to compare the 2 tcl files used to build the block designs on these platforms.

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Thank you @rock. I also tried to port a running project from Zybo to the PYNQ but I am getting some problems. The design is based in this reference (Zybo Z7 HDMI Input/Output Demo - Digilent Reference) from digilent and is working in standalone mode.

I tried answer this already. The PYNQ Python class for the video system for the Z2 board is controlling the IP in the video subsystem. This won’t work for the design for the Zybo as the video subsystem is different, i.e. it has different IP. This is why you get the object not found.

We don’t have that Zybo to test the video design. This is complicated as you are outside the spec for the HDMI. (By the way, your updated clock constraint is wrong for the edge, but I’m not sure how much difference that would make.) Slight P&R differences could be making a difference.

Does the “PYNQ” design work at 720p on the Zybo?

Cathal

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Thank you @cathalmccabe. The Zybo does not work either for 720p neither 1080p.
I don’t understand why the object is not found but it is shown in ip_dict.
Also, I made a simple project with Zynq Processor, DVI2RGB, RGB2DVI and AXI_GPIO. And I can access the AXI_GPIO and assert hdmi_in_hpd and video is shown. But with that HDMI reference I have this problem.

I am attaching the pdf design block of the project that works (I just assert hdmi_in_hpd to one and video starts streaming, differently from HDMI reference).
design_1.pdf (82.4 KB)