SPI communication between MCP3304 ADC and PYNQ Z1

Hi,
I’m attempting to establish communication with an MCP3304 ADC using AXI Quad SPI. While I’ve successfully designed a custom overlay, I’m facing difficulties in interacting with the sensor. I’m seeking guidance on how to create a Python wrapper to facilitate this communication.
Below is the screenshot of the implemented design and the related files:



base.hwh (202.8 KB)
base.tcl (33.3 KB)
base_wrapper.bit (3.9 MB)

Hi @Bhargava_Upadhya,
could you please go through the earlier conversation on related topic:

It might provide you an overall idea.

Hi @mizan ,

Thanks for the reply. I went through the related conversation and I tried the same using MCP3304:
image

Can you please clarify the format of the output and provide an explanation for the significance of each element within the array?

Regards,
Bhargava

As far i remember, sending data was very straight forward. But, for receiving you have to send two extra cycle of data, so can you delete first two cycle of data which is useless. But it is completely depends on the IC, how its protocol is written. So, if whatever i was testing is similar to yours, you want to have 3 received data bytes then you actually have to sent total of 5 bytes of data.

In my opinion, your IC is not similar and you have only one extra byte, so omit 255 in this case. The two data later on is the data you want. if you want to have 3 data bytes, you have to send a garbage address at the end, so can you receive one extra bytes of data.

This datasheet will explain more about what they are:
image

image

As i can see, you have selected channel 1 by sending the command according to the above reference.
the received data
255(0xFF, irrelevant),
202(0xCA-0b’11001010), here 11 is don’t care, 0 is start bit, 0 is sign bit, 1010 - MSB
0x43- 0b’01000011 LSB
so, your data is 0101001000011 (2627 in decimal)

My previous post is not relevant to your needs.

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Hi @mizan ,

I appreciate your response. I’ve successfully managed to implement the changes and achieve the intended outcome. Thank you for your assistance.

Regards,
Bhargava

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Hello @mizan,

Within the same overlay, I’m encountering challenges in comprehending two particular aspects:

  1. How can I modify or adjust the clock frequency - I aimed to attain a clock frequency of 100 MHz and configured the ext_spi_clk to 160 MHz with a Frequency Ratio of 16 x 10 in the design, as per the instructions provided in the link below. However, it seems that changing these values does not affect the number of transactions within a specific time frame.
    https://support.xilinx.com/s/question/0D52E00006hpcQiSAI/axi-quad-spi-frequency-ratio-and-multiplying-factor?language=en_US

  2. I have made the necessary modifications in the design to accommodate multiple slaves, but I’m encountering challenges while creating a Python wrapper for it. If there is any example code or a sample wrapper available for handling multiple slaves, please provide it to assist me in this task.

Regards,
Bhargava

Hello Bhargava,

  1. First of all, ext_spi_clk can’t exceed axi4 clock according to the datasheet. Also, a maximum speed of ext_spi_clk is around 80-100 MHz (check product guide PG153 please)
  2. As I stated in a previous post, I had a tough time implementing slave mode as there was probably a bug that might have been fixed by now. But I have not tried since. I have not seen any wrapper available for it. The OP of that post probably found a solution, you can ask him.

Edit:

It is actually quite easy if go through the register values mentioned in the datasheet. you just need to set the SPI Slave Select Register (0x70) value. If it is missing something, you might need to adjust other registers e.g. control register (0x60).

Could you please provide guidance on how to calculate the current clock speed and how to make the necessary modifications to achieve a clock speed of 100 MHz?

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