Dorfell,
So sad that I didn’t have ZYNQ Ultra scale on hand as most the work focus on pure FPGA in the pass.
So the closest is to use MB w Kintex U but this is not the best way.
My board is a custom one only got lowest LE xc7z010 so I don’t even waste time on the CONV and MAXPOOL as MNIST is really small network. Under my research in the pass BNN can suffer over 15 to 20% loss if not properly design.
So why not even just move to old days FC NN and achieve 90% accuracy which do its work perfectly.
Meantime, ZYNQ ARM7 can even do power thing we see as SIMD is already very good if proper designed but driver or API do need to work out with this that I cannot tell exist is plug and use.
I didn’t got enough study on the ARM of Ultrascale ZYNQ so I cannot tell much. But the story is getting more deviated if you ask me. FPGA is a ASIC subset to speed-up chip design and low-volume design or idea of proof purpose. So when designing application on powerful ARM hard-core I personal say it is losing the point here.
The only reason why I really want to run tensorflow on ARM is only to have a baseline on the ARM runtime vs FPGA acceleration time comparison nothing-else do worth. Meantime, why tflite or tf is needed is just make life easier when weight loading (lazy + less error) as additional weight export and load introduce more work to rectification.
Thank you