Vitis Arbitrary Precision Types

Support
1

Hello, I’ve written an overlay that takes in an array of ap_uint<10> which represent control words for my design. This is controlled with an axilite interface to the zynq PS.

The ports are defined as follows:

void March_Controller (//ports
		//Control Signals
		//March_Controller_Class::control_signals_format& control_signals,
		std::array<std::array<ap_uint<10>,17>,16>& operation_array_port,
		DUT_address& addresses_high,
		DUT_address& addresses_low,

		//DUT Communication
		hls::stream<DUT_command_packet>& DUT_command_stream
		//output

		)
	{//port interface definition

#pragma HLS INTERFACE mode=axis      port=DUT_command_stream
#pragma HLS INTERFACE mode=s_axilite port=addresses_high  		bundle=address_space
#pragma HLS INTERFACE mode=s_axilite port=addresses_low   		bundle=address_space
#pragma HLS INTERFACE mode=s_axilite port=operation_array_port	bundle=operations

#pragma HLS INTERFACE mode=s_axilite port=return
#pragma HLS stable variable=addresses_high,addresses_low,operation_array_port

//body code follows, not relevant here

The block diagram is as follows:

Screenshot 2023-08-14 100404
Screenshot 2023-08-14 1004041032×471 19.7 KB

I’m looking to write to the operation_array port, but what is the best way to write 10bit words over a 32bit interface? I assume the first array element will be at address 0, and I know that the entire array will fit exactly into 85 32 bit words, I’m just wondering the best way to order the 10bit words within that sequence.

Any help is much appreciated!

2

Hi @Dstebz,

Welcome to the PYNQ community.

First, you need to check how Vitis HLS is mapping your array to registers.

In Vitis HLS there should be a folder with the name driver, in there you can find the C driver. There’s also a header that shows to which offset the arguments are mapped.

Mario

3

Thanks for your reply.
Vitis defined the struct as follows:

typedef struct {
    u32 word_0;
    u32 word_1;
    u32 word_2;
    u32 word_3;
    u32 word_4;
    u32 word_5;
    u32 word_6;
    u32 word_7;
    u32 word_8;
} XMarch_controller_Operation_array_port;

Addresswise, the synthesis report says the following:

Screenshot 2023-08-14 110048
Screenshot 2023-08-14 110048714×165 4.54 KB

Vivado says:

Screenshot 2023-08-14 110026
Screenshot 2023-08-14 1100261310×363 96.2 KB

The driver src file is included below:
src.zip (7.0 KB)

I’m not very experienced in C as I have only worked with C++, so I’m finding it hard to work it out from these files.

Cheers

4

Hi,

Please, check the xmarch_controller_hw.c file, in there you’ll find the base address for the operation array.

Mario

5

I know the base address, I’m looking for advice on how to handle the wrapping of the 10bit words in the array using the 8*32bit words that I’m writing to it with.

6

Hi @Dstebz,

I would suggest you look at how to create custom datatypes with NumPy.

Otherwise, you may have to compose the numbers manually using shifts and mask.

Mario