PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

Adding Another VDMA into Base Overlay

I am adding another vdma into the base overlay. I followed the example of the existing vdma but only activate the the read channel. The AXI control and AXI stream is connect to slave S_AXI_HP1_FPD. I tried to use auto address assign for my vdma AXI LITE but it is still unconnected.

Are you having problems other than the AXI Lite wasn’t auto-connected? Could you manually assign/connect it?

Cathal

The vdma is connected in the block diagram however the address editor show that the control register of the vdma is unconnected. Here is the picture of it.