AXI UARTLite - PYNQ

Support
1

PYNQ version: 2.6.0
Board: PYNQ-Z2
Tool version: Vivado 2020.1

Hi everyone,

This is my first post on this forum, I am a beginner with PYNQ. I’ll try my best to provide you the necessary information for answering my question. The .hwh and .bit files are added below.

I have created an overlay in Vivado using the AXI UARTLite IP, and set the Arduino pins AR0 and AR1 as RX and TX channel in the constraints file. The final goal is to be able to read data coming from a GPS chip but for now, instead of using the GPS, I would like to write and read data to and from the board myself using Jupyter to check if everything is set up properly.

So far, one of the things I’ve tried is the following:

from pynq import Overlay
ol = Overlay("design_1_wrapper.bit")
uart = ol.axi_uartlite_0

# Perform some checks:

print("Bitstream loaded: ", ol.is_loaded())
print("Available IPs: ", list(ol.ip_dict.keys()), '\n')

Now, whenever I try to read the RX register,

uart.read(0x00)

the following message appears: “The kernel appears to have died. It will restart automatically.”

I assume that my overlay is downloaded properly, and that the name of the IP is correct since I checked this with the code above. What else can I do?

Thanks in advance!

design_1_wrapper.bit (3.9 MB)
design_1_wrapper.hwh (153.1 KB)

2

As a new user, I could only add 2 files in one post, so here are the .tcl file and a picture of the overlay as well:

AXI_UARTLite
AXI_UARTLite1540×680 106 KB

design_1_wrapper.tcl (13.1 KB)

3

Are you checking the status register to make sure there is valid data before reading the RX register?
If the RX FIFO is empty, reading from it will trigger a SLVERR on the AXI bus which could be the cause of the crash.

Cathal