Hi Folks,
We need to capture raw samples from both ADCs simultaneously at 512MHz to the PLDDR4. On the ZCU111 this wasn’t an issue: the default PL DDR4 clock is 300MHz so the data-rates work out. On the RFSOC 2x2 the PL DDR4 clock defaults to 200MHz so this isn’t possible.
Page 11 of https://www.rfsoc-pynq.io/pdf/RFSoC_2x2_UG.pdf has a rather scary note about one shot reprogramming of the clocks (for that matter it isn’t clear if that one-shot was used at the factory.
Has anyone given thought to the specific steps involved? I’m a bit worried about bricking out boards or running into other gotchas with the board presets in Vivado.
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The docs for that part have a section on non-volatile memory:
The Si5341/40 is fully configurable using the serial interface (I2C or SPI). At power-up the device downloads its default register values from internal non-volatile memory (NVM). Application specific default configurations can be written into NVM allowing the device to generate specific clock frequencies at power-up. Writing default values to NVM is in-circuit programmable with normal operating power supply voltages applied to its VDD and VDDA pins. The NVM is two time writable. Once a new configuration has been written to NVM, the old configuration is no longer accessible. Refer to the Si5340/41 Family Reference Manual for a detailed procedure for writing registers to NVM.
It would appear that the RFSoC2x2 Si5340 comes with a configuration written to the NVM that results in a 200 MHz clock on start-up. The data sheet indicates it is possible to write a new configuration to the NVM one more time, so we could replace this configuration with one for 300 MHz. Otherwise, we will have to program it every time we power cycle the board.
The 200/300 MHz clock is only a reference clock to the MIG. You can change the MIG configuration to clock the DRAM at a faster speed, without changing the 200MHz ref clock. You set the RefClock in the MIG.
The fastest supported cycle time is 750pS (DDR4-2666).
You should be able to change this setting here:
Cathal
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