Custom VHDL Image Processing IP Integration for Video Streaming

Hello everyone,
I’m working on a VHDL project for a PYNQ Z2 board (Image v2.5), creating a custom IP block for image processing with filters like rgb2gray and sobel. The goal is to integrate this IP into video hardware design using the AXI protocol. Notably, I prefer not to use HLS for this block.

I’m seeking guidance or examples for this integration. Any tips or insights would be greatly welcomed.

Kind regards,

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If you are asking about using a design like this with PYNQ, I have some tutorials here:
[cathalmccabe/PYNQ_tutorials](GitHub - cathalmccabe/PYNQ_tutorials)


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Hello Cathal,

Thank you for your prompt response and for sharing the tutorials. I’ll definitely check them out for additional insights.

Regarding my question, I found the DMA guide particularly helpful in understanding how to stream images via Jupyter Notebook to the custom IP block I developed in Vivado. It provided clear instructions and helped me navigate through the integration process smoothly.

Once again, thank you for your assistance and for providing such professional and accessible resources.

Best regards,