Help Building Pynq 2.7 for Ultra96v2

I am trying to build Pynq 2.7 for the Ultra96 V2 and am experiencing some errors. Here are the tools I am using:
Vivado 2020.2
Vitis 2020.2
yk22_patch
Petalinux-V2020.2-final
GitHub - Avnet/Ultra96-PYNQ: Board files to build Ultra 96 PYNQ image image_v2.7
GitHub - Xilinx/PYNQ: Python Productivity for ZYNQ image_v2.7

I execute script build96.sh 2 to target Ultra96 V2.

The build progresses normally for about an hour and a half until I get the following errors -

****** Vivado v2020.2 (64-bit)
**** SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020
**** IP Build 3064653 on Wed Nov 18 14:17:31 MST 2020
** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.

source check_timing.tcl -notrace
Timing constraints are met.
INFO: [Common 17-206] Exiting Vivado at Mon Jun 20 16:26:42 2022…
Error: The file is corrupt. Please re-install this software from the original media.
Abnormal program termination (6)
Please check ‘/home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/PYNQ/boards/Pynq-Z2/base/hs_err_pid1421.log’ for details
makefile:19: recipe for target ‘check_timing’ failed
make[1]: *** [check_timing] Error 134
make[1]: Leaving directory ‘/home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/PYNQ/boards/Pynq-Z2/base’

  • unmount_special
  • for fs in $fss
  • sudo umount -l /home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/focal.Ultra96/proc
  • for fs in $fss
  • sudo umount -l /home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/focal.Ultra96/run
  • for fs in $fss
  • sudo umount -l /home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/focal.Ultra96/dev
  • sudo umount -l /home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/focal.Ultra96/ccache
  • rmdir /home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/focal.Ultra96/ccache
    Makefile:343: recipe for target ‘/home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/Ultra96.tar.gz’ failed
    make: *** [/home/pynq27/pynq/Ultra96-PYNQ/PYNQ-git/sdbuild/build/Ultra96.tar.gz] Error 2
    Status: PYNQ build FAILED
    pynq27@pynq27-VirtualBox:~/pynq/Ultra96-PYNQ$

Here are the contents of hs_err_pid1421.log:

An unexpected error has occurred (6)

Stack:
/lib/x86_64-linux-gnu/libc.so.6(+0x3ef10) [0x7f3b9d573f10]
/lib/x86_64-linux-gnu/libc.so.6(gsignal+0xc7) [0x7f3b9d573e87]
/lib/x86_64-linux-gnu/libc.so.6(abort+0x141) [0x7f3b9d5757f1]
/tools/Xilinx/Vivado/2020.2/lib/lnx64.o/librdi_common.so(HUTFileUtils::checkRegistry_real(std::__cxx11::basic_string<char, std::char_traits, std::allocator > const&, std::__cxx11::basic_string<char, std::char_traits, std::allocator > const&)+0x1785) [0x7f3b9eb67c75]
/tools/Xilinx/Vivado/2020.2/lib/lnx64.o/librdi_common.so(HUTFileUtils::doWork()+0xe0) [0x7f3b9eb67f60]
/tools/Xilinx/Vivado/2020.2/lib/lnx64.o/librdi_common.so(HUTFileUtils::WorkThreadProc(void*)+0x9) [0x7f3b9eb680c9]
/lib/x86_64-linux-gnu/libpthread.so.0(+0x76db) [0x7f3b9d31d6db]
/lib/x86_64-linux-gnu/libc.so.6(clone+0x3f) [0x7f3b9d65661f]

I checked the md5sum of the installation .tar.gz and it is correct.
I reinstalled Vitis/Vivado and got the same errors.
I do not have any .lic files installed. Could this be the problem?
I can install the license for the HLS tools for the Ultra96 but the failure occurs during the PYNQ-Z2 build. Could it be no HDMI license?

Perhaps there is a simpler solution to the reason I am building Pynq 2.7 for the Ultra96 V2.
I need to speed up the I2C from the PS to 400KHz for external I2C peripherals that are connected to the PS.
Is there a simpler way to do this?
Is it more straightforward to edit the device tree to perform this?

Thanks in advance for any advice/help.

If you are using vitualbox:
Please check this:

Brian,
Thank you for the pointers. I tried Vagrant in the past but encountered package dependency issues. I learned that packages required for petalinux need to be apt-get installed prior to VBox_GAs disk is loaded or packages will be reported as broken and dependencies cannot be met if installed afterwards
My VM is Ubuntu 18.04.4, 240GB virtual disk, #6 CPU, 16384 RAM.
I have the virtual hard disk as dynamically allocated.
Does it need to be fixed?
You mention to use Vitis HLS. I have Vitis and Vitis HLS installed.
Am supposed to source the settings64.sh in the Vitis HLS directory instead of the one in the Vitis directory?
I don’t have any licenses installed. Will I need to install any licenses for this build process to work?

for 2020.2 HLS there is a hot-fixed on the ip generate so it is necessary to run the script to fixe it.
Meantime ensure license are loaded which i.e. HDMI is not free but you are allow to freely evaluate.
If you ensure the env settings are same as what the final procedure I had posted which (confirmed in this community several times).
You should have no problem on the build and make sure Vagrant is real pain in the ass but the readme yet not updating so far. Completely up to our own saving here.

Hi, If this a Vivado HDMI IP license issue you can try to not build that IP by removing the contenst of the build.sh file from the PYNQ repo before running the Ultra96v2 makefile. In future releases I hope to add this tweak to the build script for Ultra96. If it does nothing else for you it will speed up the re-build.

In the build script for Ultra96 you would modify this section which will stop it from building any of the IP for any of the other boards (which used to be necessary but is no longer):

if [ -d "$PYNQ_GIT_LOCAL_PATH/boards/Pynq-Z1" ]; then
  echo "Status: Removing boards to speed up build time and eliminate needing hdmi license"
  cd $PYNQ_GIT_LOCAL_PATH
  echo "" > build.sh
  git rm -rf $PYNQ_GIT_LOCAL_PATH/boards/Pynq-Z1
  # The changes must be committed because PYNQ clones local when it builds
  git commit -am 'remove boards'
  echo "Status: Removed other boards"
  cd $START_DIR
fi

Otherwise it may be an issue because of trying to build using a VM. I have only built the v2.7 images for Ultra96 using the only supported version of Ubuntu 18.04 natively. I have for other boards used Hyper-V with mixed success, ultimately going back to a native Ubuntu PC to complete the builds reliably.

I am not sure about how to change the I2C using a different method. I do think it could be changed in the device tree but I can’t precisely provide guidance on how without playing with it. Why don’t you try looking for or asking just that question alone in the AMD-Xilinx PetaLinux or MPSoC forums and see if someone has direct experience with that?

Kind regards

1 Like

Hello pynqzen,
I recieved 1-year license vouchers for the Ultra96-V2s but the voucher is for the SDSoC tools that ended support at 2019.1 so I have installed Vitis/Vivado HLx 2020.2 and petalinux-v2020.2-final.
For building PYNQ 2.7 for the Ultra96V2 board;
I did install the HDMI (90 day evaluation license) but will modify the build script to save time.
Can I use Vivado (free WebPACK license) or do I need Vivado HLS (30 day evaluation license) for the build?
Do I need a petalinux tool license (365 day evaluation license) for the build?
Thanks

Hi Jon,

Just make sure you open the license manager to ensure HDMI is load to the according network card of virtual machine you are using.
And sometime the build is a bit touchy that if the first build is not success just remove the build.sh line as this post asked before and works complete normal and fine.
Read the entire post to let yourself more clear about the build.

Hi again,

I made the prior post wording accurate, you remove the contents of build.sh not the file itself. The script snippet I posted was accurate. With that change to build.sh, the Ultra96 build scripts should no longer build any reference designs from the non Ultra96 boards that require a license. The HDMI IP which needs a license is used for some of the other AMD-Xilinx boards, the Ultra96 does not use that IP.

There is no license required for PetaLinux and the Ultra96 ZU3 device can be built using the free Vivado web-pack version (note: Xilinx did call it web-pack for v2020.1 but the latest Vivado versions are just referred to as standard edition free).

Kind regards

I re-built the VM using some hybrid of the Avnet VirtualBox_Installation_Guide_2020_1_v1p1 and successfully built a Pynq-Z2 2.7 image. I didn’t install XRT. I didn’t load the VB guest additions until after loading the packages required for petalinux. I first loaded the 2020.1 tools and got pretty far (had to follow Briansune instructions on adding packages isl-0.2.0 and expat-2.2.6 to the /src directory) but ultimately failed with package dependency issues from requirements.txt. changed all package versions to <= in requirements .text but then failed later on with to low of version of node package for jupyter. I reinstalled 2020.2 tools and built 2.7 for Pynq-Z2. it did fail once while building logictools overlay and I determined the cryptic error was that the HLS license for Vivado is required to build this overlay. After installing the HLS license, typing make, and passing out for a couple of hours, I woke up to a bootable image!! I will update on the ultra96 build as soon as it either works or fails. Thanks to you both for you help.

1 Like

I have a successfully generated the Pynq 2.7.0 image for the Ultra96-V2. My next steps are to modify the makefile per pynqzen and unload all of the Xilinx licenses and proceed with another build. Thanks again briansune and pynqzen for your help.

3 Likes

Hi,

I have a fork that nulls out building any of the other PYNQ boards. It seems to compile for me, I did not have time to finish up, nor do any testing on a board. But there isn’t any reason why this shouldn’t work as good as the prior. Sometime in the near future I will merge this in when I start working on the next version of U96 PYNQ coming out hopefully sometime this fall.

Here is the fork: GitHub - FredKellerman/Ultra96-PYNQ: Board files to build Ultra 96 PYNQ image

It’s in the master branch. Just exec build96.sh [1 | 2]

If you do use, please make a fork for yourself. My time to work on this ebbs and flows. I would like to retain the freedom to close out my fork when it is convenient for me :slight_smile:

Kind regards and best of luck with your project

1 Like

Zen,

I appreciate the work but it will be highly suggest to verify the flow and do build success before merging.
Meantime, I think the current virtual env just need to make it ready as good as possible. Shown here.

And even Ultra-Zynq just need to pay a bit attention to the dtsl config.
As issue resolved here