I’m trying to implement a SHA-256 IP in Vivado, referred to this work (GitHub - secworks/sha256: Hardware implementation of the SHA-256 cryptographic hash function) and used their stream interface in Verilog to create the IP. My block diagram looks like this so far:
As I export the bitstream and use it as an overlay on PYNQ-Z1 board, the code cell runs and stalls, when stopping the kernel I see that this is the issue!
KeyboardInterrupt Traceback (most recent call last)
/usr/local/lib/python3.6/dist-packages/pynq/lib/dma.py in wait(self)
raise RuntimeError(‘DMA channel not started’)
→ error = self._mmio.read(self._offset + 4)
if error & 0x10:
Would anyone be able to advise on this problem, it would be much appreciated! Btw, I’ve also considered and tried using HLS to create the SHA256 IP but I got stuck on that as well :’^)