Hi:
As far as I can tell, the LMK04208_122.88.txt file containing the register configuration for the ZCU111 located in the RFSoC-PYNQ repository has mistakes in it, and I’m wondering if anyone else has seen this as well?
If I compare the register values there to the values in the XRFDC driver - here, for example:
specifically registers 6, 7, and 8 are
0x03300006,0x01300007,0x06010008,
whereas in the PYNQ file (LMK04208_122.88.txt) they are
R6 0x01100006
R7 0x01100007
R8 0x06010008
The differences there are that the CLKoutX_TYPE bits in the Xilinx registers are set to
CLKout0_TYPE = 3 = LVPECL (1200 mVpp)
CLKout1_TYPE = 3 = LVPECL (1200 mVpp)
CLKout2_TYPE = 3 = LVPECL (1200 mVpp)
CLKout3_TYPE = 1 = LVDS
CLKout4_TYPE = 1 = LVDS
CLKout5_TYPE = 6 = LVCMOS (Norm/Inv)
and in the PYNQ file they are set to
CLKout0_TYPE = 3 = LVDS
CLKout1_TYPE = 3 = LVDS
CLKout2_TYPE = 3 = LVDS
CLKout3_TYPE = 1 = LVDS
CLKout4_TYPE = 1 = LVDS
CLKout5_TYPE = 6 = LVCMOS (Norm/Inv)
Looking at the ZCU111 schematic, CLKout0/1/2 are connected to SYSREF_FPGA, SYSREF_RFSOC, and FPGA_REFCLK_OUT, and they are all hooked up as if they were LVPECL (with 240 ohm to ground resistors) and they are specified as LVPECL in UG1271 (p44/45).
Is this just a mistake or was there some reason for doing this?