Hello, I would like to integrate ZMOD’s with PYNQ but I have encountered some problems.
In short, I need to add
&ZmodADC_0_AXI_ZmodADC1410_1 {
compatible = “generic-uio”;
};
&ZmodDAC_0_AXI_ZmodDAC1411_v1_0_0 {
compatible = “generic-uio”;
};
&amba_pl {
axidma_chrdev_0: axidma_chrdev@0 {
compatible = “xlnx,axidma-chrdev”;
dmas = <&ZmodADC_0_axi_dma_0 0>;
dma-names = “rx_channel”;
index = <0>;
};
axidma_chrdev_1: axidma_chrdev@1 {
compatible = “xlnx,axidma-chrdev”;
dmas = <&ZmodDAC_0_axi_dma_1 0>;
dma-names = “tx_channel”;
index = <1>;
};
};
to device tree. These are located In PL, and are not included in device-tree for PYNQ.
Now I’m enabling FPGA manager and Device tree overlays and I got PL.dtsi with PL fragments from petalinux project. I tried to add manually changes to PL.dtsi and compile it with PYNQ-PRIO but I got some error with uio device.
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 5 10:13:24 2020
*/
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&fpga_full>;
overlay0: __overlay__ {
#address-cells = <1>;
#size-cells = <1>;
firmware-name = "design_1_wrapper.bit.bin";
};
};
fragment@1 {
target = <&amba>;
overlay1: __overlay__ {
afi0: afi0@f8008000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "xlnx,afi-fpga";
reg = <0xF8008000 0x1000>;
xlnx,afi-width = <0>;
};
clocking0: clocking0 {
#clock-cells = <0>;
assigned-clock-rates = <100000000>;
assigned-clocks = <&clkc 15>;
clock-output-names = "fabric_clk";
clocks = <&clkc 15>;
compatible = "xlnx,fclk";
};
};
};
fragment@2 {
target = <&amba>;
overlay2: __overlay__ {
#address-cells = <1>;
#size-cells = <1>;
ZmodADC_0_AXI_ZmodADC1410_1: AXI_ZmodADC1410@43c00000 {
clock-names = "s00_axi_aclk";
clocks = <&misc_clk_0>;
compatible = "generic-uio";
interrupt-names = "lIrqOut";
interrupt-parent = <&intc>;
interrupts = <0 29 4>;
reg = <0x43c00000 0x10000>;
xlnx,s00-axi-addr-width = <0x7>;
xlnx,s00-axi-data-width = <0x20>;
};
misc_clk_0: misc_clk_0 {
#clock-cells = <0>;
clock-frequency = <50000000>;
compatible = "fixed-clock";
};
ZmodADC_0_axi_dma_0: dma@40400000 {
#dma-cells = <1>;
clock-names = "s_axi_lite_aclk", "m_axi_s2mm_aclk";
clocks = <&misc_clk_0>, <&misc_clk_1>;
compatible = "xlnx,axi-dma-7.1", "xlnx,axi-dma-1.00.a";
interrupt-names = "s2mm_introut";
interrupt-parent = <&intc>;
interrupts = <0 30 4>;
reg = <0x40400000 0x10000>;
xlnx,addrwidth = <0x20>;
xlnx,sg-length-width = <0x10>;
dma-channel@40400030 {
compatible = "xlnx,axi-dma-s2mm-channel";
dma-channels = <0x1>;
interrupts = <0 30 4>;
xlnx,datawidth = <0x20>;
xlnx,device-id = <0x0>;
};
};
misc_clk_1: misc_clk_1 {
#clock-cells = <0>;
clock-frequency = <100000000>;
compatible = "fixed-clock";
};
ZmodDAC_0_AXI_ZmodDAC1411_v1_0_0: AXI_ZmodDAC1411_v1_0@43c10000 {
clock-names = "s00_axi_aclk";
clocks = <&misc_clk_0>;
compatible = "generic-uio";
reg = <0x43c10000 0x10000>;
xlnx,s00-axi-addr-width = <0x7>;
xlnx,s00-axi-data-width = <0x20>;
};
ZmodDAC_0_axi_dma_1: dma@40410000 {
#dma-cells = <1>;
clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk";
clocks = <&misc_clk_0>, <&misc_clk_1>;
compatible = "xlnx,axi-dma-7.1", "xlnx,axi-dma-1.00.a";
interrupt-names = "mm2s_introut";
interrupt-parent = <&intc>;
interrupts = <0 31 4>;
reg = <0x40410000 0x10000>;
xlnx,addrwidth = <0x20>;
xlnx,sg-length-width = <0xe>;
dma-channel@40410000 {
compatible = "xlnx,axi-dma-mm2s-channel";
dma-channels = <0x1>;
interrupts = <0 31 4>;
xlnx,datawidth = <0x20>;
xlnx,device-id = <0x1>;
};
};
axidma_chrdev_0: axidma_chrdev@0 {
compatible = "xlnx,axidma-chrdev";
dmas = <&ZmodADC_0_axi_dma_0 0>;
dma-names = "rx_channel";
index = <0>;
};
axidma_chrdev_1: axidma_chrdev@1 {
compatible = "xlnx,axidma-chrdev";
dmas = <&ZmodDAC_0_axi_dma_1 0>;
dma-names = "tx_channel";
index = <1>;
};
};
};
};
In jupyter notebook
ol = Overlay(“/home/xilinx/jupyter_notebooks/SomeFolder/test.bit”)
ol.download(dtbo=“/home/xilinx/jupyter_notebooks/SomeFolder/pl.dtbo”)
And I have an error.
Why is Fabric colliding with uio0? Is the overlay fragment somehow broken?
This is device-tree generated by petalinux ProjectFiles - Google Drive