RFSoC 4x2: How to locked clk_in0 to dout8 through LMK04828 and then give to FPGA PL SYS REFCLK?

I need to give a external 80MHz sine wave to clkin0 as a reference clock, and use PLLs in LMK04828 to divide 320MHz clock for FPGA and ADC. I want all the clock (including FPGA and ADC) can keep in synchronization with the external 80MHz sine wave signal.
But when I cut off the external clkin0, the fpga still have reference clock (but have no sysref), so how to locked clk_in0 to dout8 through LMK04828 and then give to FPGA PL SYS REFCLK?

Hi,

You need to use TICS PRO software to change the internal clockings of LMK04828 and LMX2594.

Best