Stuck at recvchannel.wait()

[marioruiz]

Is the AXI HP0 FPD Data with set to 128? Like suggested here

Using AXI DMA on ZCU104

Yes - they should be 128. There has to be a match between that setting and what’s configured in software when the board boots and the block design. For the PYNQ boot files we keep the default of 128 so that’s what the block design should have as well. Peter

I would also suggest to burn the 2.6 pynq image.

You may also want to check if the stream_out is asserting tlast by adding a ChipScope on your design.

Mario