(PYNQ-Z2 (3.0.1))
Hi everyone,
I’m a student currently starting my journey in FPGA hardware acceleration. My background is a mix of physics and engineering, so I’m still relatively new to the world of digital design and PYNQ-based workflows. For context, I’m working on a small project where an AI model generates synthetic pulses mimicking the analog signal from a neutron monitor. I’m emulating the signal acquisition and its later digital processing on the FPGA.
To generate the analog signal, I use a basic DAC (MCP4725) that sends a predefined pulse array through I2C (for more info: Problem with I2C Interface with DAC MCP4725 through Arduino pins). Then, I loop that signal back into the FPGA via the XADC.
First problem: the pulse has 328 elements, each sent over I2C at 3 bytes per element, and I’m already pushing the I2C IP to 1 MHz (its max speed). At 100 kHz (as shown in the oscilloscope image), the signal is way too slow.
To minimize oversampling, I configured the XADC for its lowest sampling rate (39 kSPS) !!. I followed Adam Taylor’s example from this article and the design works, but I now hit a serious wall. I cannot acquire more than 256 samples per pulse. I confirmed TLAST is being generated every 256 samples via the AXI4-Stream Subset Converter (which seems to be the limiting factor).
I’m stuck 
What are your recommendations for acquiring full pulses from the XADC using DMA on PYNQ?Any help or guidance would be deeply appreciated. I’m running out of ideas and would love a push in the right direction.
Thanks in advance!
P.S.
Due to external constraints, I can’t share the full source code — the pulse is generated by a custom AI model. However, all the relevant configuration and behavior is clearly shown in the captures I’m uploading. Let me know if more system details are needed!
dac_xadc_CaLMa_bd_wrapper.bit (3.9 MB)
dac_xadc_CaLMa_bd_wrapper.tcl (13.7 KB)