Using vivado on Pynq-Z2 board without PS

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1

I’ve been trying to create a simple vivado project without using ARM-PS.
I can set up a clock with H16 but I don’t know where to find a reset button.
The Pynq manual says that there is a board reset but it doesn’t look that that reset button is directly exposed to PL based on the master pin mapping XDC.
How can I put a reset in PL w/o using PS?

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2

If you are using the PL “Ethernet” clock (H15), this clock is unstable unless an Ethernet cable is plugging in.

There is no “reset” pin connected to the PL. You could use one of the 4x pushbuttons, or one of the 2x switches which are connected to the PL. You would use this as the reset input in your PL design.

Cathal

3

Thanks for your reply. It’s good to know that there is no reset. I tried the option of using a push bottun for the reset. Some simple designs worked but some designs didn’t work. Vivado complains about pin planning so I decided not to pursue that routeEspecially when I try to use it with clock wizard. If that route should work, I’ll try it again.

4

OK. If you are new to FPGA you might want to check on the Xilinx forums or follow some introductory FPGA tutorials. Using a button as a reset for a design is an introductory exercise.

Cathal

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5

In these case I personally just use PS as a clock and reset source and the rest can be used like a bare FPGA. You can put your PS and all of these in a hierarchy and forget about it.
This avoid the hassles of having to understand the board and hoping to find substitutes.

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