Okay so I took a look at your tutorial about the AXI Master interfaces and if I understand you correctly, the assignment of the memory to store the data is done through Jupyter. Unfortunately, that will not be possible in the final deployment of the Board.
What is should be used for is as a data gathering system aboard a university CubeSat and the actual OBC of the satellite will send commands (probably via SPI) to the FPGA to collect sensor data (some Mbs in total) and then also send the data via an also FPGA-based SDR on the same chip. We will not be using a PYNQ Board in the final application but rather such a board and currently we are prototyping with the PYNQ Board.
So am I correct in assuming memory allocation is not really possible from PL?