The Software Defined Radio Research Laboratory at the University of Strathclyde have released a wideband spectrum analyser for RFSoC, currently capable of inspecting 256 MHz of bandwidth.
PYNQ and Voila have been leveraged to aid in the control of the system and visualisation of the resulting spectrum. In addition, much of the design has been hardware accelerated to provide real-time acquisition and inspection of the data. The diagram below provides an overview of the system.
Key Features
- Up to 256 MHz bandwidth for inspection
- 3 available ADCs to select from at runtime
- RF data generator (BPSK, QPSK, 8PSK, 16QAM) to DAC for loopback
- Adaptive bandwidth control and center frequency selection
- Reprogrammable windowing
- Hardware accelerated processing (time domain → frequency domain → power spectral density [dB])
- PYNQ abstracted allowing Python to interface with the hardware
- Plotly visualisation of spectrum and spectrogram (waterfall)
- Voila dashboard for more convenient control/visualisation
More Information
GitHub: GitHub - strath-sdr/rfsoc_sam: RFSoC Spectrum Analyser Module on PYNQ.
License: BSD 3-Clause
Special thanks to the PYNQ team at Xilinx for their continued help and support.