Hello PYNQ community!
The new RFSoC2x2 development platform was recently announced and is offered exclusively for academic researchers. Alongside this new platform, a series of demonstration and educational material was created by the University of Strathclyde’s Software Defined Radio research laboratory. Strathclyde’s RFSoC material ranges from open source spectral analysis and frequency planning tools, to SDR implementations of Orthognal Frequency Division Multiplexing (OFDM) and digital modulation radio schemes. Each of these demonstration systems have been implemented using the PYNQ framework to simplify analysis and visualization.
Strathclyde’s RFSoC demonstration systems and educational materials have now been ported to the ZCU111 development board. If you are an industrial consumer, or non-academic, you can now access the range of materials Strathclyde have created with the ZCU111 development platform.
Lets take a moment to show-off each of these tools and demonstration systems, and provide links to where you can find the source code for each project.
An Open Source Spectrum Analyzer
The highlight of these materials is an open source Spectrum Analyzer. The underlying FPGA architecture of the Spectrum Analyzer was developed using HDL Coder from The MathWorks. When using the Spectrum Analyzer on the ZCU111 development board, you will have access to four ADC channels. Each channel is capable of sampling upto 4096Msps and can dynamically switch between Nyquist Zones as required.
The Spectrum Analyzer also has reprogrammable windowing, a spectrogram for frequency plotting over time, and a range of FFT sizes and decimation options to improve spectral resolution. If you have a ZCU111 development board to hand, you can install the Spectrum Analyzer to your PYNQ v2.6 operating system by following the instructions in the project’s GitHub repository.
RFSoC Frequency Planning with Python
A significant part of developing an application with RFSoC, is taking into consideration undesirable spurs using a frequency plan. A typical radio frequency plan considers signal harmonics, interleaving associated with the DAC and ADC, Phase Locked Loop reference clocks, and the subtle interactions between each of these components. Strathclyde have developed an interactive Python based tool that can be used to support RFSoC developers when planning their system. This tool was based on the original frequency planner created by Xilinx.
RFSoC developers can use the frequency planner to ensure that their band of interest does not overlap with any spurious signals. You can install and contribute to this project through the GitHub repository. Alternatively, you can try out an online version of this tool that is currently hosted on Heroku.
1024-QAM Demonstration System
At this point, you may be familiar with several RFSoC SDR systems in current literature and research. The Quadrature Phase Shift Keying (QPSK) demonstrator was the first Strathclyde RFSoC and PYNQ introspection system. The RFSoC and PYNQ project has certainly evolved since then, and resulted in a full OFDM transmitter and receiver design, capable of using several digital modulation schemes. These range from simple Binary Phase Shift Keying (BPSK) to a modulation scheme as ‘complex’ as 1024-QAM. This entire OFDM design is open source and available for you to freely download and use at your own leisure.
If you have a ZCU111 development board, or even an RFSoC2x2, you should spend some time exploring the OFDM demonstrator. The resulting constellation diagram is visually appealing and interesting to observe. You can install the OFDM example system now by following the instructions on the project’s GitHub repository.
A “Hello World!” Transceiver
You can transmit and receive a “Hello World!” message with RFSoC by using Strathclyde’s BPSK demonstration system. This simple example uses Xilinx System Generator to design and generate FPGA architectures for a BPSK transmitter and receiver. The BPSK transmitter uses the RFSoC’s DAC to transmit a BPSK signal. The signal is looped back into the RFSoC’s ADC for coarse, time, carrier, and frame synchronisation. It is possible to visualise and control each synchronisation stage, allowing the user to see the effects of switching-off stages and manipulating their parameters.
The BPSK “Hello World!” example is a great way to learn the basics of RFSoC system design with PYNQ. The demonstrator even allows the user to transmit and receive BPSK messages between two boards, forming a duplex system. If you would like to install the BPSK demonstrator or contribute to the project, use the GitHub repository.
Automatic Gain Control
If you are interested in Automatic Gain Control (AGC), Strathclyde have a digital loopback example. In this project, PYNQ is used generate various input signals that allow you to explore interesting effects of the AGC algorithm. Users can practice tweaking AGC parameters for optimal performance and visualise results through dynamic plotting and feedback.
You can download and contribute to this project, or post questions and feedback from the GitHub repository, PYNQ AGC Demonstration.
RFSoC and Educational Notebooks
Additional material has been developed by Strathclyde to support teaching of fundamental concepts and techniques for digital signal processing design for wireless communications. In particular, these notebooks present introductory material for the following:
Core Topics:
- An Introduction to RFSoC
- Sampling and Quantisation
- The Frequency Spectrum
- Modulation and Demodulation
- Baseband Modulation
- Digital Filters
Specialised Topics:
- Machine Learning for Communication Systems
- OFDM Fundamentals
You can access these notebooks from the following GitHub repositories: RFSoC Notebooks, and DSP Notebooks.
The RFSoC Studio Installer
Finally, there is a global installer for all of the above projects and materials. These are all collectively named the PYNQ RFSoC Studio. You can use the installer located here if you would like all of the projects to download and install at the same time on your RFSoC development board.
The Software Define Radio group at the University of Strathclyde would like to thank the entire Xilinx PYNQ team for their continued help and support of this work and other open source efforts targeting the RFSoC platform.