Hi,
Python, numpy, DMA only support 8,16,32,64b datawidths so you need to cast your data to standard width integers, signed or unsigned according to what you used in hls.
in VHDL you would do something stupid like taking an 8b output std_logic_vector (7 downto 0) :=“00000000”
[8b-std_logic_vectorname] (5 downto 0)<=[6b-std_logic_vectorname]; --this puts the 6 bits in a vector of 8 where the 2 MSb s are “00”
in hls you can probably take a new ap_int with 8b precision and assign your 6b ap_int to it, it will probably automagically assign “00” to the MSb s. the 8b ap_int should be an argument of your function so it can be read from and written to.
if you want to process large chunks of data, it is indeed best to use axi-stream interfaces with axi-DMA,
link to a post where all necessary tutorials are available, this is how i learnt it: