Axi dma needs the overlay to be downloaded again to produce results for new values

It looks like I have to reload the dma everytime I need to get the computations for new values. How do I overcome this?

This is the code that I am using:

import time
import struct
from pynq import Overlay
import pynq.lib.dma
from pynq import Xlnk
import numpy as np
from pynq import MMIO

ol = Overlay('kernel.bit') # check your path # it downloads your bit to FPGA
dma = ol.axi_dma_0 # creating a dma instance. Note that we packed smul and smul_dma into streamMul
sadd_ip = ol.smul_0 
xlnk = Xlnk()

def pl_rbf_kernel(samples):
    length = samples.shape[0]
    in_buffer = xlnk.cma_array(shape=(length,), dtype=np.float32)
    np.copyto(in_buffer, samples)
    sadd_ip.write(0x18, length)
    return struct.unpack("f", struct.pack("I",


When I run the last line for differnt values, it gives me results for the previous input. When I run it once again then it gives me results for the current input.

What is your IP doing?
It could be taking longer to calculate than the time it takes to read back the value from register 0x10.

I fixed the formatting for your post. For info, blocks of code can be fenced by lines with three back-ticks
``` and ```