PYNQ version: 2.7
I’m trying to do the exercise about the BRAM.
- Create HLS IP which copy the data of A array (m_axi) to B array (located in BRAM)
- Create Vivado project and add above IP with BRAM generator and controller (for PS CPU access)
- Create Python code on PYNQ-Z2 and process following steps:
(1) Instance IPs (read_romcode_0 and axi_bram_ctrl_0)
(2) Allocate input_buffer and initial it with test pattern
(3) Use IP axi_bram_ctrl_0 mmio function (write, read) to initial BRAM.
(4) Configure IP read_romcode_0 source address (input_buffer), and trigger ap_start (offset 0x00 = 1)
(5) Use IP axi_bram_ctrl_0 mmio read to check the context of BRAM after read_romcode_0 move the data.
In my expected, the result should be the same in the step 2 and 5. (read_romcode_0 move the input_buffer data into BRAM).
But the result is strange, the IP seems move the data with a different start base. (I suppose they should use the base 0). Does any one can help to answer? thanks!!