Hi,
I am making a design based on the example RFSoC-MTS
I want to change the Sampling Rate of the data converters, specifically that of the DACs.
From what I have read here xrfclk, I have to generate some new tics files, change them and call the set_ref_clks function. So far so good, but I have tried to do this and it doesn’t seem to work.
I have checked the usp_rf_data_converter parameters using an ol.ip_dict and they have not changed, they still have their original value. I have also changed the overlay via Vivado to change the ip core fs.
Do I have to do anything else to change the fs ? am I missing something ?
Thanks in advance.
Adrián