On enabling bitstream during boot, a similar issue has been discussed in this forum post. The solution is to disable fpga manager and then your bitstream will load on boot, but you will lose the ability to dynamically load overlays in PYNQ.
Regarding the previous solutions, if your bitstream needs to be loaded for the device tree to properly register the pcie device maybe the approach of just modifying the dts won’t work, you may very well be better off doing a device tree overlay. I can’t come up with any examples of doing this for pcie, but there is dtbo example here, there’s some posts on the topic on more official Xilinx confluence pages and the comments on the linux-xlnx github is a good resources to help you configure your individual entries correctly.
Thanks
Shawn