How to connect custom HLS IP to Zynq board

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@youn123 if you use axi instead of fifo interfaces it should be easier to connect to the PS.

#pragma HLS INTERFACE s_axilite port=return
#pragma HLS INTERFACE m_axi depth=<MatrixSize> port=a
#pragma HLS INTERFACE m_axi depth=<MatrixSize> port=b
#pragma HLS INTERFACE m_axi depth=<MatrixSize> port=res

You have to replace with an appropriate valite. The first pragma creates an AXI4-Lite interface to control the module.

You also need to enable the HP ports of the PS.

confPS
confPS1037×783 116 KB

After that you can Run Connection Automation twice and the block design should look like this

bd
bd1840×641 109 KB

You can also use AXI4-Stream for a,b and res and use other way to move data.

Do you have any preference about how to communicate the IP with the PS?

Mario

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