Device: RFSoC 4x2 Kit
PYNQ Version: v3.0.1
I successfully implemented the RFSoC-MTS project and successfully output the custom waveform from the DAC to the spectrum analyzer.
However, I don’t understand how to receive the waveform output by the DAC through the ADC.
Hi,
Did you wire your loopback as indicated in the github’s notebook?
(RFSoC-MTS/boards/RFSoC4x2/notebooks/rfsocMTS.ipynb at main · Xilinx/RFSoC-MTS · GitHub)
Yes, I followed the connection method in the GitHub notebook. What I don’t understand is how to fully read the data from adc_dma
.
For example: how to configure the DMA size and specify a particular ADC channel.
My goal is to transmit a custom waveform from the DAC to the ADC for reception. I don’t need the MTS functionality. When I tried to rebuild the entire project following the RFSoc4x2_mts.tcl
script provided by the boards, I noticed that the board file in mts.tcl
uses the ZCU208.
Can you please send the code you are using to transmit a signal from the DAC?
Thank you for your help. The DAC transmission code is as follows, and the bit file used is downloaded from MTS:
code:
from rfsoc_mts import mtsOverlay
from pynq import allocate
import numpy as np
import matplotlib.pyplot as plt
import time
ol = mtsOverlay(‘mts.bit’)
Amplitude = 16383.0
f_start = 1000e6
f_stop = 2000e6
BW = f_stop - f_start
N = 21
F_step = BW / (N - 1)
DAC_samples_rate = 4000e6
frequencies = np.arange(f_start, f_stop + F_step, F_step)
X = (1/DAC_samples_rate) * np.arange(0,ol.dac_player.shape[0])
waveforms = {}
for idx, freq in enumerate(frequencies):
DAC_sinewave = Amplitude * np.sin(2 * np.pi * freq * X)
waveforms[idx] = DAC_sinewave
ol.dac_player[:] = np.int16(waveforms[0])
ol.dac_enable.on()
As there is an ol.dac_player, is there an ol.adc_player? Is something about adc displayed when you try the line help(ol) in a jupyter notebook?
When I enter help(ol), I do not find ol.adc_player, but the following information is provided.
Help on mtsOverlay in module rfsoc_mts.mts:
<rfsoc_mts.mts.mtsOverlay object>
Default documentation for overlay /RFSoC-MTS/build/lib/rfsoc_mts/mts1.bit. The following
attributes are available on this overlay:
IP Blocks
----------
clocktreeMTS/MTSclkwiz : pynq.overlay.DefaultIP
deepCapture/axi_dma_adc : pynq.lib.dma.DMA
gpio_control/axi_gpio_bram_adc : pynq.lib.axigpio.AxiGPIO
gpio_control/axi_gpio_dac : pynq.lib.axigpio.AxiGPIO
gpio_control/axi_gpio_fifoflush : pynq.lib.axigpio.AxiGPIO
system_management_wiz_0 : pynq.overlay.DefaultIP
usp_rf_data_converter_1 : xrfdc.RFdc
zynq_ultra_ps_e_0 : pynq.overlay.DefaultIP
Hierarchies
-----------
clocktreeMTS : pynq.overlay.DefaultHierarchy
deepCapture : pynq.overlay.DefaultHierarchy
gpio_control : pynq.overlay.DefaultHierarchy
hier_adc0_cap : pynq.overlay.DefaultHierarchy
hier_adc1_cap : pynq.overlay.DefaultHierarchy
hier_adc2_cap : pynq.overlay.DefaultHierarchy
hier_dac_cap : pynq.overlay.DefaultHierarchy
hier_dac_play : pynq.overlay.DefaultHierarchy
hier_adc0_cap/ADCRAMcapture_0 : pynq.overlay.DefaultHierarchy
hier_adc1_cap/ADCRAMcapture_0 : pynq.overlay.DefaultHierarchy
hier_adc2_cap/ADCRAMcapture_0 : pynq.overlay.DefaultHierarchy
hier_dac_cap/ADCRAMcapture_0 : pynq.overlay.DefaultHierarchy
hier_dac_play/DACRAMstreamer_0 : pynq.overlay.DefaultHierarchy
Interrupts
----------
None
GPIO Outputs
------------
None
Memories
------------
ddr4_0 : Memory
hier_adc0_capaxi_bram_ctrl_0 : Memory
hier_adc1_capaxi_bram_ctrl_0 : Memory
hier_adc2_capaxi_bram_ctrl_0 : Memory
hier_dac_capaxi_bram_ctrl_0 : Memory
hier_dac_playaxi_bram_ctrl_0 : Memory
PSDDR : Memory