RFSoC-MTS Repository - Enabling Multi-Tile Synchronization on the ZCU208

I am happy to announce the launch of the RFSoC-MTS repository. This repository demonstrates the RFSoC’s Multi-Tile Synchronization (MTS) capability with the ZCU208. The repository is located at: GitHub - Xilinx/RFSoC-MTS: A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).

Multi-tile synchronization is an important capability of the RFSoC enabling beamforming, phased RADAR arrays, massive MIMO and more. In the figure below, data is captured first without MTS (left). The RFSoC tiles run independently from one another. However, if deterministic latency is required and the clocking requirements are met, both DAC and ADC tiles can be synchronized (right). When enabled, MTS allows phase aligned generation of DAC samples and capturing of ADC samples.

The provided overlay and notebook demonstrate this capability by looping back DAC generated samples to the ADC tiles. Samples are generated from an internal DAC RAM and captured to internal memories as shown in the figure below. The overlay also uses the PL DDR4 memory to capture more samples.
mtsOverlayBlockdiagram_resize

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Is it available for ZCU111 and/or the 4x2 board as well?

Any plans for adding support for MTS across devices with enabled ADC/DAC NCOs?

Hi everyone,
There are no plans yet to release this design for the ZCU111.

You can still use MTS if you use the DAC DUCs and ADC DDCs. However, the settings do need to be identical. Enabling MTS configures a daisy-chain between adjacent tiles. The settings are discussed in PG269.

The wizard for the RF Data Converter will enforce the constraints for MTS. However, it does not validate the user_sysref_adc or user_sysref_dac clocking. PG269 discusses the clock relationships.

But with regards to your NCO question, you can enable the DDC, decimate and perform complex mixing with a “fine” NCO. MTS is still supported and you can still change the NCO frequencies at run-time.
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Thanks @njachimi How about the RFSoC 4x2 board? Is it supported on that?

Thank you @njachimi , I’ve implemented the digital feature sync procedures in my configuration scripts and I think I got the DAC NCOs to synchronize across two ZCU216 boards but the ADC NCOs seem to not align. I’m sure there is something that I’m missing.

Enabling multi-tile sync across multiple boards is going to require insuring that your SYSREF is distributed properly to each board. It is no secret that the technique used in the RFSoC is based off of the same used for JESD204.

It may be difficult to phase align SYSREF from board to board. It is advisable to provide the SYSREF signal from a clock generator board (ie CLK104), test equipment (ie the 10MHz reference) or another clock distribution chip that can phase align the reference signal throughout the system. Matched length cables, connectors and adapters are a must. So first you should verify that the distributed reference signals are arriving in-phase to each of your boards. Using an oscilloscope with matched length BNC cables can be a quick peace of mind thing to verify.

Below are two references regarding JEDS204 SYS REF alignment issues that may be of help to you moving forward.

  1. Synchronizing Multiple ADCs Using JESD204B | Analog Devices

  2. https://ez.analog.com/fpga/f/q-a/550189/jesd-204b-multiple-board-synchronization-issue

  3. See page 170 of Documentation Portal

Hopefully this gets you aligned.

Regards,
-N

Thanks, I have that part already figured out and the SYSREFs from the 2 boards are perfectly aligned to within 20-40 ps.

Hi Aravind,
Some minor changes are necessary to enable this example for the RFSoC4x2. The ADC and DAC tiles have a different clocking configuration that is still MTS capable, however, we have not yet scheduled a release date for this board’s overlay.
Regards,
-N