PYNQ: PYTHON PRODUCTIVITY

How to specify the allocated memory address in PYNQ

HI! all.
As we know, we always use the Xlnk class to apply for memory allocation before using DMA, but in this case, the physical address obtained through input_buffer.physical_address is beyond our control.
I want to know whether the physical address can be assigned by ourselves when PYNQ applies for memory allocation? Or is there a function to directly allocate the memory space as a DDR address that can be directly accessed by DMA?

Thank you all for your replies in advance!

The physical addresses are entirely at the whim of the Linux kernel so there’s no way to specify the address for buffers in system DRAM. Is there a reason you need to?

Peter

1 Like

Hi! Peter,
Thanks again for your reply!I want to use two DMAs and two HP ports to transfer data from DRAM to PL at the same time, just like the link:Multiple DMAs, But only one work.
However, I found that one of the DMAs was not working properly. Then, I read the status register and found that it pointed out DMA Decode Error. This error occurs if the address request points to an invalid address.
So I read the physical address accessed by DMA1 , I found that the problem is that this address is less than the start address of my HP1 port, which leads to the inability to read the data in DRAM from HP1 port.Just like the address 0x18050000 of input_buffer.physical_address in the figure is less than 0x20000000 of the start address of my HP1 port.
image
To make matters worse, because the four memories (input_buffer_0, output_buffer_0, input_buffer_1, output_buffer_1) allocated by the Xlnk class are continuous, I cannot reduce the start address of HP1 in the Vivado Address Editor to make the addresses of input_buffer_1 and output_buffer_1 larger than The address of the HP1 port, Because it is very likely that the newly allocated physical address is all greater than the address of the HP1 port, so that data cannot be read from the HP0 port.
I don’t know what should i do

I am looking forward to your reply!Thank you so much!

We don’t support accessing the system DRAM at a non-zero offset. Is there a reason that you need to do this? Vivado is generally happier if everything’s at the same offset as well.

If you really want to you could add your offset to the buffer’s device_address property which would give you the behaviour you’re looking for but isn’t recommended.

Peter

Ok, thank you, Piter.
I am a newbie, so I want to know if the block design can be designed like this

That looks fine - the default addresses allocated by the address editor for this design should also be fine with PYNQ - namely the DDR memory at offset 0 on both HP0 and HP1.

As you come to optimise the design you might want to consider HP2 instead of HP1 as HP0 and HP1 share the same port on the DDR memory controller but that shouldn’t have any impact on the functional correctness of your design.

Peter

1 Like

Thank you very much for your patience in explaining the things to me.