Can you elaborate a little bit on this?
Do you mean that you are forced to have a write channel on both vdmas or dma.py will error out? In such a case, can you report where it is erroring out exactly?
Can you elaborate a little bit on this?
Do you mean that you are forced to have a write channel on both vdmas or dma.py will error out? In such a case, can you report where it is erroring out exactly?