PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

Load data to IP via DMA

@Jia-Ming_Lin I tested your design, there is nothing wrong with the hardware. But I think you used wrong buffer size in your software. Please change your KERNEL_DIM to 3, since your HLS IP has that parameter.

# model
KERNEL_DIM = 3

You can also try my notebook + project if you want:

  1. Reboot your board.
  2. Move the 3 files attached files into one folder under jupyter_notebooks.
  3. Run.
    docompute.zip (243.3 KB)

I have the tcl files zipped. I am using 2019.1 in the entire flow.
docompute_overlay.zip (12.1 KB)

1 Like

Hi @rock,
Thank you for the kindly help, it works now.

Just to update this.

I was building the Vivado HW in 2018.3 and running the .tcl file in PYNQ V2.5. This does not work since the DMA IP has been updated. It gets stuck. Not sure of the low level details but it does not work.
So the solution was to install 2019.1 and update the design and then re-export the .hwh and bit file. Now it works.